From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FOxay-0000hu-Gh for qemu-devel@nongnu.org; Thu, 30 Mar 2006 08:53:52 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FOxaw-0000eP-Ls for qemu-devel@nongnu.org; Thu, 30 Mar 2006 08:53:52 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FOxaw-0000eD-IC for qemu-devel@nongnu.org; Thu, 30 Mar 2006 08:53:50 -0500 Received: from [193.7.176.20] (helo=bender.bawue.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA:24) (Exim 4.52) id 1FOxd7-0007q3-Mc for qemu-devel@nongnu.org; Thu, 30 Mar 2006 08:56:05 -0500 Received: from lagash (unknown [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 747C544268 for ; Thu, 30 Mar 2006 15:53:44 +0200 (MEST) Received: from ths by lagash with local (Exim 4.60) (envelope-from ) id 1FOxaL-0002mM-H4 for qemu-devel@nongnu.org; Thu, 30 Mar 2006 14:53:13 +0100 Date: Thu, 30 Mar 2006 14:53:13 +0100 Subject: Re: [Qemu-devel] [PATCH] Add MIPS ELF loader Message-ID: <20060330135313.GA11525@networkno.de> References: <4428DE4B.6040802@gmail.com> <20060328130159.GA31939@networkno.de> <442BDFC9.40009@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <442BDFC9.40009@gmail.com> From: Thiemo Seufer Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Thu, Mar 30, 2006 at 03:40:25PM +0200, Dirk Behme wrote: > Thiemo Seufer wrote: > >On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote: > >>What about the patch in attachment? It first tries to load > >>image as an ELF file. If this fails it falls back to raw > >>image load. Additionally, it takes feature of patch above to > >>go on even if no BIOS is found. > > > > > >A slightly more polished version with less noisy messages is appended. > >It also adjusts the ramdisk load address to physical addressing, > >similiar to the binary kernel load. > > One question I just found: > > If we go on if no BIOS is found/executed and we load some > stuff to e.g. 0x80010000, where is the default address > translation made? As I understand MIPS, code in kseg0 > (0x80000000) and kseg1 (0xA0000000) should be executable > without MMU/TLB setup because it is mapped by default to > physical 0x0. But looks to me that I get a > > cpu_mips_handle_mmu_fault pc 80010000 ad 80010000 rw 2 > is_user 0 smmu 1 That comes not from the MIPS TLB mapping (which is for KSEG0/1 a fixed translation involving the high bits) but the underlying qemu softmmu support. The whole thing works but eats significant performance, there should be room for improvements. Thiemo