From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FRzGL-0008TS-3j for qemu-devel@nongnu.org; Fri, 07 Apr 2006 18:17:05 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FRzGG-0008TF-R3 for qemu-devel@nongnu.org; Fri, 07 Apr 2006 18:17:03 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FRzGG-0008TC-MD for qemu-devel@nongnu.org; Fri, 07 Apr 2006 18:17:00 -0400 Received: from [212.247.154.12] (helo=swip.net) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FRzKJ-0005mV-Sn for qemu-devel@nongnu.org; Fri, 07 Apr 2006 18:21:12 -0400 Received: from d213-103-212-247.cust.tele2.fr ([213.103.212.247] verified) by mailfe01.swip.net (CommuniGate Pro SMTP 5.0.8) with ESMTP id 155060963 for qemu-devel@nongnu.org; Sat, 08 Apr 2006 00:15:27 +0200 From: Even Rouault MIME-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_ASuNEin1BPzzu9e" Message-Id: <200604080015.28057.even.rouault@mines-paris.org> Subject: [Qemu-devel] [PATCH] SPARC target : Fix carry flag update in addxcc and subxcc ops Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Date: Fri, 07 Apr 2006 22:17:05 -0000 To: qemu-devel@nongnu.org --Boundary-00=_ASuNEin1BPzzu9e Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Disposition: inline I send a patch that should fix a bug in the update of carry flag for addxcc and subxcc instructions when the carry flag is set before the evaluation of the instruction. (the fix is identical to what is done in the similar instruction op_adcl_T0_T1_cc for arm target) --Boundary-00=_ASuNEin1BPzzu9e Content-Type: text/x-diff; charset="us-ascii"; name="qemu-sparc-carry-xcc-ops.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="qemu-sparc-carry-xcc-ops.patch" ? patch-qemu-sparc-xcc_ops.txt Index: op.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/op.c,v retrieving revision 1.18 diff -u -p -r1.18 op.c --- op.c 30 Oct 2005 17:28:50 -0000 1.18 +++ op.c 7 Apr 2006 22:04:40 -0000 @@ -415,9 +415,9 @@ void OPPROTO op_addx_T1_T0(void) void OPPROTO op_addx_T1_T0_cc(void) { target_ulong src1; - + target_ulong has_carry = FLAG_SET(PSR_CARRY); src1 = T0; - T0 += T1 + FLAG_SET(PSR_CARRY); + T0 += T1 + has_carry; env->psr = 0; #ifdef TARGET_SPARC64 if (!(T0 & 0xffffffff)) @@ -435,7 +435,7 @@ void OPPROTO op_addx_T1_T0_cc(void) env->xcc |= PSR_ZERO; if ((int64_t) T0 < 0) env->xcc |= PSR_NEG; - if (T0 < src1) + if (T0 < src1 || (has_carry && T0 <= src1)) env->xcc |= PSR_CARRY; if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63)) env->xcc |= PSR_OVF; @@ -444,7 +444,7 @@ void OPPROTO op_addx_T1_T0_cc(void) env->psr |= PSR_ZERO; if ((int32_t) T0 < 0) env->psr |= PSR_NEG; - if (T0 < src1) + if (T0 < src1 || (has_carry && T0 <= src1)) env->psr |= PSR_CARRY; if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31)) env->psr |= PSR_OVF; @@ -505,9 +505,9 @@ void OPPROTO op_subx_T1_T0(void) void OPPROTO op_subx_T1_T0_cc(void) { target_ulong src1; - + target_ulong has_carry = FLAG_SET(PSR_CARRY); src1 = T0; - T0 -= T1 + FLAG_SET(PSR_CARRY); + T0 -= T1 + has_carry; env->psr = 0; #ifdef TARGET_SPARC64 if (!(T0 & 0xffffffff)) @@ -525,7 +525,7 @@ void OPPROTO op_subx_T1_T0_cc(void) env->xcc |= PSR_ZERO; if ((int64_t) T0 < 0) env->xcc |= PSR_NEG; - if (src1 < T1) + if (src1 < T1 || (has_carry && src1 <= T1)) env->xcc |= PSR_CARRY; if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63)) env->xcc |= PSR_OVF; @@ -534,7 +534,7 @@ void OPPROTO op_subx_T1_T0_cc(void) env->psr |= PSR_ZERO; if ((int32_t) T0 < 0) env->psr |= PSR_NEG; - if (src1 < T1) + if (src1 < T1 || (has_carry && src1 <= T1)) env->psr |= PSR_CARRY; if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31)) env->psr |= PSR_OVF; --Boundary-00=_ASuNEin1BPzzu9e--