From: Brice Goglin <brice@myri.com>
To: linux-pci@atrey.karlin.mff.cuni.cz
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 0/8] Improve MSI detection v2
Date: Sun, 18 Jun 2006 21:05:45 -0400 [thread overview]
Message-ID: <20060619010544.GA29950@myri.com> (raw)
[PATCH 0/8] Improve MSI detection v2
After my proposal to whitelist chipsets supporting MSI a couple days ago,
here's a patchset implementing what seemed to better suit what people replied.
We enable MSI by default on PCI-E and disable on non-PCI-E chipsets.
#1 - Rename PCI_CAP_ID_HT_IRQCONF to PCI_CAP_ID_HT
#2 - Factorize common MSI detection code from pci_enable_msi() and msix()
#3 - Blacklist PCI-E chipsets depending on Hypertransport MSI capabality
#4 - Stop inheriting bus flags and check root chipset bus flags instead
#5 - Whitelist Intel PCI chipsets that are known to support MSI
#6 - Disable MSI by default on non PCI-E chipsets
#7 - Drop existing quirks that disable MSI on some non PCI-E chipsets
#8 - Drop pci_msi_quirk
#1 to #4 are simple and could make it to 2.6.18 easily.
#6 might need the list of whitelisted chipsets to be improved to avoid
regressions (nVidia chipsets for Intel processors?).
#5 is useless without #6.
#7 and #8 are mainly cosmetic (remove obsolete stuff when the new model
is in place).
These patches are against 2.6.17-rc6-mm2.
I did not keep the option "pci=forcemsi" since it makes less sense than
in my previous RFC. But I'd be happy to reimplement it, or even something
at the device granularity.
Brice Goglin
next reply other threads:[~2006-06-19 1:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-19 1:05 Brice Goglin [this message]
2006-06-19 1:07 ` [PATCH 1/8] Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT Brice Goglin
2006-06-19 1:08 ` [PATCH 2/8] Factorize common MSI detection code from pci_enable_msi() and msix() Brice Goglin
2006-06-19 1:08 ` [PATCH 3/8] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality Brice Goglin
2006-06-19 1:08 ` [PATCH 4/8] Stop inheriting bus flags and check root chipset bus flags instead Brice Goglin
2006-06-19 1:09 ` [PATCH 5/8] Whitelist non-PCI-E chipsets that are known to support MSI Brice Goglin
2006-06-19 1:09 ` [PATCH 6/8] Disable MSI by default on non-PCI-E chipset Brice Goglin
2006-06-19 1:09 ` [PATCH 7/8] Drop existing quirks that disable MSI on some non PCI-E chipsets Brice Goglin
2006-06-19 1:10 ` [PATCH 8/8] Drop pci_msi_quirk Brice Goglin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20060619010544.GA29950@myri.com \
--to=brice@myri.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@atrey.karlin.mff.cuni.cz \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.