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From: Brice Goglin <brice@myri.com>
To: linux-pci@atrey.karlin.mff.cuni.cz
Cc: linux-kernel@vger.kernel.org
Subject: [patch 4/7] Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT
Date: Sun, 02 Jul 2006 20:40:03 -0400	[thread overview]
Message-ID: <20060703004056.029311000@myri.com> (raw)
In-Reply-To: 20060703003959.942374000@myri.com

[-- Attachment #1: 04-rename_pci_cap_id_ht_irqconf.patch --]
[-- Type: text/plain, Size: 3118 bytes --]

0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be
the subtype 0x80 that mpic_scan_ht_pic() uses.
Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT.

And by the way, use it in the ipath driver instead of defining its
own HT_CAPABILITY_ID.

Signed-off-by: Brice Goglin <brice@myri.com>
---
 arch/powerpc/sysdev/mpic.c                |    2 +-
 drivers/infiniband/hw/ipath/ipath_ht400.c |    5 ++---
 include/linux/pci_regs.h                  |    2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

Index: linux-git/arch/powerpc/sysdev/mpic.c
===================================================================
--- linux-git.orig/arch/powerpc/sysdev/mpic.c	2006-07-02 11:41:33.000000000 -0400
+++ linux-git/arch/powerpc/sysdev/mpic.c	2006-07-02 11:41:40.000000000 -0400
@@ -249,7 +249,7 @@
 	for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
 	     pos = readb(devbase + pos + PCI_CAP_LIST_NEXT)) {
 		u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
-		if (id == PCI_CAP_ID_HT_IRQCONF) {
+		if (id == PCI_CAP_ID_HT) {
 			id = readb(devbase + pos + 3);
 			if (id == 0x80)
 				break;
Index: linux-git/include/linux/pci_regs.h
===================================================================
--- linux-git.orig/include/linux/pci_regs.h	2006-07-02 11:41:33.000000000 -0400
+++ linux-git/include/linux/pci_regs.h	2006-07-02 11:41:40.000000000 -0400
@@ -196,7 +196,7 @@
 #define  PCI_CAP_ID_MSI		0x05	/* Message Signalled Interrupts */
 #define  PCI_CAP_ID_CHSWP	0x06	/* CompactPCI HotSwap */
 #define  PCI_CAP_ID_PCIX	0x07	/* PCI-X */
-#define  PCI_CAP_ID_HT_IRQCONF	0x08	/* HyperTransport IRQ Configuration */
+#define  PCI_CAP_ID_HT		0x08	/* HyperTransport */
 #define  PCI_CAP_ID_VNDR	0x09	/* Vendor specific capability */
 #define  PCI_CAP_ID_SHPC 	0x0C	/* PCI Standard Hot-Plug Controller */
 #define  PCI_CAP_ID_EXP 	0x10	/* PCI Express */
Index: linux-git/drivers/infiniband/hw/ipath/ipath_ht400.c
===================================================================
--- linux-git.orig/drivers/infiniband/hw/ipath/ipath_ht400.c	2006-07-02 11:42:39.000000000 -0400
+++ linux-git/drivers/infiniband/hw/ipath/ipath_ht400.c	2006-07-02 11:43:09.000000000 -0400
@@ -742,7 +742,6 @@
 	return 0;
 }
 
-#define HT_CAPABILITY_ID   0x08	/* HT capabilities not defined in kernel */
 #define HT_INTR_DISC_CONFIG  0x80	/* HT interrupt and discovery cap */
 #define HT_INTR_REG_INDEX    2	/* intconfig requires indirect accesses */
 
@@ -973,7 +972,7 @@
 	 * do this early, before we ever enable errors or hardware errors,
 	 * mostly to avoid causing the chip to enter freeze mode.
 	 */
-	pos = pci_find_capability(pdev, HT_CAPABILITY_ID);
+	pos = pci_find_capability(pdev, PCI_CAP_ID_HT);
 	if (!pos) {
 		ipath_dev_err(dd, "Couldn't find HyperTransport "
 			      "capability; no interrupts\n");
@@ -996,7 +995,7 @@
 		else if (cap_type == HT_INTR_DISC_CONFIG)
 			ihandler = set_int_handler(dd, pdev, pos);
 	} while ((pos = pci_find_next_capability(pdev, pos,
-						 HT_CAPABILITY_ID)));
+						 PCI_CAP_ID_HT)));
 
 	if (!ihandler) {
 		ipath_dev_err(dd, "Couldn't find interrupt handler in "


  parent reply	other threads:[~2006-07-03  0:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-07-03  0:39 [patch 0/7] Improve MSI detection v5 Brice Goglin
2006-07-03  0:40 ` [patch 1/7] Merge existing MSI disabling quirks Brice Goglin
2006-07-03  0:40 ` [patch 2/7] Factorize common MSI detection code from pci_enable_msi() and msix() Brice Goglin
2006-07-03  0:40 ` [patch 3/7] Check root chipset no_msi flag instead of all parent busses flags Brice Goglin
2006-07-04  7:06   ` Grant Grundler
2006-07-04 23:12     ` Brice Goglin
2006-07-05  3:48       ` Grant Grundler
2006-07-05  4:38         ` Brice Goglin
2006-07-06 15:39           ` Grant Grundler
2006-07-06 15:46             ` Brice Goglin
2006-07-06  0:50   ` Benjamin Herrenschmidt
2006-07-03  0:40 ` Brice Goglin [this message]
2006-07-03  0:40 ` [patch 5/7] Blacklist PCI-E chipsets depending on Hypertransport MSI capability Brice Goglin
2006-07-03  0:40 ` [patch 6/7] Drop pci_msi_quirk Brice Goglin
2006-07-03  0:40 ` [patch 7/7] Drop pci bus_flags Brice Goglin

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