From: Andi Kleen <ak@suse.de>
To: discuss@x86-64.org
Cc: Sergio Monteiro Basto <sergio@sergiomb.no-ip.org>,
torvalds@osdl.org, linux-kernel@vger.kernel.org
Subject: Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC
Date: Tue, 1 Aug 2006 19:10:25 +0200 [thread overview]
Message-ID: <200608011910.25110.ak@suse.de> (raw)
In-Reply-To: <1154437483.3264.14.camel@localhost.localdomain>
> I had some faith in this patch , but this just enable boot parameter
> notsc (which I already use). And "just" disable tsc don't solve all the
> problems.
What problems do you have?
>
>
> After "Using ACPI (MADT) for SMP configuration information"
> my acpi_fadt.length is great than 0
> acpi_fadt.plvl3_lat is 1001
You don't have C3 support so the patch doesn't apply to you.
> On BIOS 1.40 update description of ASRock, claims this VIA chipset have
> C1 stepping support.
C1 stepping is a processor revision; it has nothing to do with
ACPI C* power states.
-Andi
next prev parent reply other threads:[~2006-08-01 17:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-29 19:42 [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC Andi Kleen
2006-08-01 13:04 ` Sergio Monteiro Basto
2006-08-01 17:10 ` Andi Kleen [this message]
2006-08-01 21:40 ` [discuss] " Sergio Monteiro Basto
2006-08-01 21:56 ` Andi Kleen
[not found] ` <1154470000.5123.1.camel@localhost.portugal>
2006-08-01 22:21 ` Andi Kleen
2006-08-01 22:52 ` Sergio Monteiro Basto
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