All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jon Mason <jdmason@us.ibm.com>
To: Muli Ben-Yehuda <muli@il.ibm.com>
Cc: ak@suse.de, linux-kernel@vger.kernel.org, discuss@x86-64.org
Subject: Re: [PATCH 2 of 4] [x86-64] Calgary: only verify the allocation bitmap if CONFIG_IOMMU_DEBUG is on
Date: Wed, 2 Aug 2006 22:57:24 -0500	[thread overview]
Message-ID: <20060803035723.GA7323@us.ibm.com> (raw)
In-Reply-To: <515131a26b151f1e4596.1154559549@rhun.haifa.ibm.com>

On Thu, Aug 03, 2006 at 01:59:09AM +0300, Muli Ben-Yehuda wrote:
> 1 files changed, 36 insertions(+), 10 deletions(-)
> arch/x86_64/kernel/pci-calgary.c |   46 +++++++++++++++++++++++++++++---------
> 
> 
> # HG changeset patch
> # User Muli Ben-Yehuda <muli@il.ibm.com>
> # Date 1154558421 -10800
> # Node ID 515131a26b151f1e459642268184d98099e72a6c
> # Parent  9cd758467ce15605504369cf56f790aea8c74748
> [x86-64] Calgary: only verify the allocation bitmap if CONFIG_IOMMU_DEBUG is on
> 
> Introduce new function verify_bit_range(). Define two versions, one
> for CONFIG_IOMMU_DEBUG enabled and one for disabled. Previously we
> were checking that the bitmap was consistent every time we allocated
> or freed an entry in the TCE table, which is good for debugging but
> incurs an unnecessary penalty on non debug builds.
> 
> Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
> Signed-off-by: Jon Mason <jdmason@us.ibm.com>
> 
> diff -r 9cd758467ce1 -r 515131a26b15 arch/x86_64/kernel/pci-calgary.c
> --- a/arch/x86_64/kernel/pci-calgary.c	Thu Aug 03 01:37:12 2006 +0300
> +++ b/arch/x86_64/kernel/pci-calgary.c	Thu Aug 03 01:40:21 2006 +0300
> @@ -133,12 +133,35 @@ static inline void tce_cache_blast_stres
>  {
>  	tce_cache_blast(tbl);
>  }
> +
> +static inline unsigned long verify_bit_range(unsigned long* bitmap,
> +	int expected, unsigned long start, unsigned long end)
> +{
> +	unsigned long idx = start;
> +
> +	BUG_ON(start > end);

This should be ">=".

Thanks,
Jon

> +
> +	while (idx < end) {
> +		if (!!test_bit(idx, bitmap) != expected)
> +			return idx;
> +		++idx;
> +	}
> +
> +	/* all bits have the expected value */
> +	return ~0UL;
> +}
>  #else /* debugging is disabled */
>  int debugging __read_mostly = 0;
>  
>  static inline void tce_cache_blast_stress(struct iommu_table *tbl)
>  {
>  }
> +
> +static inline unsigned long verify_bit_range(unsigned long* bitmap,
> +	int expected, unsigned long start, unsigned long end)
> +{
> +	return ~0UL;
> +}
>  #endif /* CONFIG_IOMMU_DEBUG */
>  
>  static inline unsigned int num_dma_pages(unsigned long dma, unsigned int dmalen)
> @@ -162,6 +185,7 @@ static void iommu_range_reserve(struct i
>  {
>  	unsigned long index;
>  	unsigned long end;
> +	unsigned long badbit;
>  
>  	index = start_addr >> PAGE_SHIFT;
>  
> @@ -173,14 +197,15 @@ static void iommu_range_reserve(struct i
>  	if (end > tbl->it_size) /* don't go off the table */
>  		end = tbl->it_size;
>  
> -	while (index < end) {
> -		if (test_bit(index, tbl->it_map))
> +	badbit = verify_bit_range(tbl->it_map, 0, index, end);
> +	if (badbit != ~0UL) {
> +		if (printk_ratelimit())
>  			printk(KERN_ERR "Calgary: entry already allocated at "
>  			       "0x%lx tbl %p dma 0x%lx npages %u\n",
> -			       index, tbl, start_addr, npages);
> -		++index;
> -	}
> -	set_bit_string(tbl->it_map, start_addr >> PAGE_SHIFT, npages);
> +			       badbit, tbl, start_addr, npages);
> +	}
> +
> +	set_bit_string(tbl->it_map, index, npages);
>  }
>  
>  static unsigned long iommu_range_alloc(struct iommu_table *tbl,
> @@ -247,7 +272,7 @@ static void __iommu_free(struct iommu_ta
>  	unsigned int npages)
>  {
>  	unsigned long entry;
> -	unsigned long i;
> +	unsigned long badbit;
>  
>  	entry = dma_addr >> PAGE_SHIFT;
>  
> @@ -255,11 +280,12 @@ static void __iommu_free(struct iommu_ta
>  
>  	tce_free(tbl, entry, npages);
>  
> -	for (i = 0; i < npages; ++i) {
> -		if (!test_bit(entry + i, tbl->it_map))
> +	badbit = verify_bit_range(tbl->it_map, 1, entry, entry + npages);
> +	if (badbit != ~0UL) {
> +		if (printk_ratelimit())
>  			printk(KERN_ERR "Calgary: bit is off at 0x%lx "
>  			       "tbl %p dma 0x%Lx entry 0x%lx npages %u\n",
> -			       entry + i, tbl, dma_addr, entry, npages);
> +			       badbit, tbl, dma_addr, entry, npages);
>  	}
>  
>  	__clear_bit_string(tbl->it_map, entry, npages);

  parent reply	other threads:[~2006-08-03  3:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <patchbomb.1154559547@rhun.haifa.ibm.com>
2006-08-02 23:16 ` [PATCH 0 of 4] x8-64: Calgary: updates for CONFIG_IOMMU_DEBUG Andi Kleen
2006-08-02 23:23   ` Muli Ben-Yehuda
     [not found] ` <515131a26b151f1e4596.1154559549@rhun.haifa.ibm.com>
2006-08-03  3:57   ` Jon Mason [this message]
2006-08-03  3:54     ` [PATCH 2 of 4] [x86-64] Calgary: only verify the allocation bitmap if CONFIG_IOMMU_DEBUG is on Andi Kleen
2006-08-03  7:19     ` Muli Ben-Yehuda

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20060803035723.GA7323@us.ibm.com \
    --to=jdmason@us.ibm.com \
    --cc=ak@suse.de \
    --cc=discuss@x86-64.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=muli@il.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.