Re: RME 9632 - Problem half solved

[Remy Bruno <remy.bruno@trinnov.com>]

On Friday 06 October at 19:12, Takashi Iwai wrote:
> Could you give a proper changelog text and a signed-off-by line to
> merge your patch into ALSA tree?

Changelog:
hdsp: support for mixer matrix of RME9632 rev 152

Signed-off-by: Remy Bruno <remy.bruno@trinnov.com>

> 
> > 
> > For the frequency problem, I got an answer from RME which explains that another
> > register needs to be set (together with the freq0, 1, 2 bits of the control
> > register). This register is the "DDS" register. Here is how it should be
> > computed:
> > UINT64 CalcDDSValue(UINT64 rate)
> > {
> >         if (rate >= 112000)
> >                 rate /= 4;
> >         else if (rate >= 56000)
> >                 rate /= 2;
> > 
> >         return 104857600000000 / rate;
> > }
> > MemBase[FREQ_REG] = (ULONG)CalcDDSValue(new_rate)
> > 
> > Any ideas of what the offset of this register is? If not, I will ask him. BTW,
> > this register exists only for the 9632 and not for the 9652.
> 
> Hm, the numerator is pretty big, it's 0x100000 * 10^7.
> A clock with fixed point?

Yes, that's weird. That's what they told me. I'll investigate this.

> 
> Anyway, remember that you cannot use 64bit division in the linux
> kernel code as it is.  You can use a macro div64_32 defined in pcm.h,
> though.

OK

Remy

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