From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] proprietary MIPS based ASIC
Date: Thu, 26 Oct 2006 13:31:45 +0100 [thread overview]
Message-ID: <200610261331.47109.paul@codesourcery.com> (raw)
In-Reply-To: <1161849045.2811555215.16130.sendItem@bloglines.com>
On Thursday 26 October 2006 08:50, larytet.39605663@bloglines.com wrote:
> Hello,
>
>
>
> I am a software developer working in a chip maker. One of our chips
> - dual MIPS 4Kec with GPON/BPON related peripherals, DDR, interrupt
> contorller, SPI, I2C and UART. This is SoC (System ooon Chip) which should
> run small chunk of software, like proprietary protocol stack, small RTOS
> (may be commercial one like Velosity or OSS like eCOS)
>
>
>
> How hard it is going to be to emulate
> full system like this ? Any examples/tutorials where to start ? Any
> experience of porting QEMU to other platforms ? Let's say MIPS+DDR+simple
> interrupt controller and no other peripherals
I suggest you look at the existing targets. e.g. the existing mips and ARM
targets. IMHO it's not that hard to add new boards.
Paul
next prev parent reply other threads:[~2006-10-26 12:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-10-26 7:50 [Qemu-devel] proprietary MIPS based ASIC larytet.39605663
2006-10-26 12:31 ` Paul Brook [this message]
2006-10-26 16:28 ` Rob Landley
2006-10-26 18:28 ` Stefan Weil
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