From: Arnd Bergmann <arnd@arndb.de>
To: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 2/16] add hypervisor support for SPU
Date: Fri, 17 Nov 2006 15:01:40 +0100 [thread overview]
Message-ID: <200611171501.40316.arnd@arndb.de> (raw)
In-Reply-To: <200611171045.kAHAjHLu020749@toshiba.co.jp>
On Friday 17 November 2006 11:45, Ishizaki Kou wrote:
> > It's used in patch 14/16 for the hypervisor access. As far as I can
> > see, it should be possible to use the existing register lock in it's
> > place though. We should hold that lock before calling any of the
> > priv1 accessors. In order to verify if this is done right,
> > you could add BUG_ON(!spin_is_locked(&spu->register_lock));
> > in the beat version of int_mask_{and,or,get,set}.
>
> Should we hold spu->register_lock before calling
> int_mask_{and,or,get,set}, like as accessing registers?
yes
> If it's true, we will replace spu->int_mask_lock by spu->register_lock.
> So we remove spu->int_mask_lock. =A0But we found a problem that
> spu_irq_class_0_bottom calls int_mask_get without holding
> spu->register_lock. We suspect that similar problems may exist.
They should be changed then in the caller.
Arnd <><
next prev parent reply other threads:[~2006-11-17 14:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-15 9:28 [PATCH 2/16] add hypervisor support for SPU Ishizaki Kou
2006-11-15 15:47 ` Arnd Bergmann
2006-11-15 18:26 ` Christoph Hellwig
2006-11-15 23:33 ` Arnd Bergmann
2006-11-17 10:45 ` Ishizaki Kou
2006-11-17 14:01 ` Arnd Bergmann [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-11-17 10:33 Ishizaki Kou
2006-11-17 21:28 ` Arnd Bergmann
2006-11-21 13:42 ` Ishizaki Kou
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