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Date: Sun, 25 Mar 2007 17:26:04 +0100
Subject: Re: [Qemu-devel] [Bug] [Patch] MIPS code fails at branch instruction
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From: Thiemo Seufer <ths@networkno.de>
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To: Stuart Brady <sdbrady@ntlworld.com>
Cc: qemu-devel@nongnu.org

Stuart Brady wrote:
> On Sun, Mar 25, 2007 at 03:43:16AM +0200, Aurelien Jarno wrote:
> > Thiemo Seufer a =E9crit :
> [...]
> > >  - Execute the second branch's delay slot instruction. Increment PC.
> [...]
>=20
> I'm surprised that this step would be there -- I would have expected it
> to be simpler to execute the target of the first branch in place of the
> second branch's delay slot.

Maybe you are right. It depends on how many cycles of delay the branch
incurs.


Thiemo