From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HaKwa-0007X2-DC for qemu-devel@nongnu.org; Sat, 07 Apr 2007 20:07:44 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HaKwY-0007Vd-2i for qemu-devel@nongnu.org; Sat, 07 Apr 2007 20:07:43 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HaKwX-0007Va-SU for qemu-devel@nongnu.org; Sat, 07 Apr 2007 20:07:41 -0400 Received: from phoenix.bawue.net ([193.7.176.60] helo=mail.bawue.net) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HaKst-0007EM-1G for qemu-devel@nongnu.org; Sat, 07 Apr 2007 20:03:55 -0400 Date: Sun, 8 Apr 2007 01:04:20 +0100 Subject: Re: [Qemu-devel] qemu Makefile.target vl.h hw/acpi.c hw/adlib.c ... Message-ID: <20070408000420.GJ21953@networkno.de> References: <200704072145.27203.paul@codesourcery.com> <1175984294.1516.33.camel@rapid> <200704080013.14771.paul@codesourcery.com> <1175990048.1516.77.camel@rapid> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1175990048.1516.77.camel@rapid> From: Thiemo Seufer Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "J. Mayer" Cc: qemu-devel@nongnu.org J. Mayer wrote: [snip] > To give you an real example why arbitrary limits are not acceptable AT > ALL: I know an embedded Mips device (widely used !) with 2 CPU, 8 PIC > and about 500 IRQ sources. Care to tell which one this is? > How can you even pretend add a limited > structure in the CPUState structure when this is exactly the kind of > device some people want to emulate in Qemu ? Your concept is completely > broken, you have to admit it. You can never put peripheral informations > in the CPUState structure. At least for MIPS it makes sense to put the CPU-internal controller in exactly that place. Thiemo