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From: Charles Manning <manningc2@actrix.gen.nz>
To: linux-mtd@lists.infradead.org, dedekind@infradead.org
Cc: Stanley Cai <stanley.w.cai@gmail.com>
Subject: Re: MLC NAND support in JFFS2
Date: Wed, 9 May 2007 09:38:45 +1200	[thread overview]
Message-ID: <200705090938.45247.manningc2@actrix.gen.nz> (raw)
In-Reply-To: <1178614097.3708.21.camel@sauron>

On Tuesday 08 May 2007 20:48, Artem Bityutskiy wrote:
> On Tue, 2007-05-08 at 16:32 +0800, Stanley Cai wrote:
> > hi
> >   I find that some vendor's MLC NAND such as Samsung require the user
> > programs the pages in the same block in sequence from least
> > significant page to most significant page. i think current JFSS2 can
> > not do this now.
>
> Please, no private mails.
>
> This was a requirement for SLC flashes as well, at least Toshiba's data
> sheets noted this. JFFS2 satisfies this requirement.

I think the bigger issue is supporting multi-bit error correction via BCH. The 
current 1-bit correcting Hamming code is inadequate for MLC.

      reply	other threads:[~2007-05-08 21:31 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-05-08  7:20 MLC NAND support in JFFS2 Stanley Cai
2007-05-08  7:39 ` Artem Bityutskiy
     [not found]   ` <dd2695e90705080132h234b7389x37762c4884047cb0@mail.gmail.com>
2007-05-08  8:48     ` Artem Bityutskiy
2007-05-08 21:38       ` Charles Manning [this message]

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