From: Ralf Baechle <ralf@linux-mips.org>
To: Franck Bui-Huu <vagabon.xyz@gmail.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>, linux-mips@linux-mips.org
Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy
Date: Thu, 7 Jun 2007 16:48:01 +0100 [thread overview]
Message-ID: <20070607154801.GG26047@linux-mips.org> (raw)
In-Reply-To: <cda58cb80706070744v21e1bbf3sa28990b4477a8844@mail.gmail.com>
On Thu, Jun 07, 2007 at 04:44:11PM +0200, Franck Bui-Huu wrote:
> > No, it doesn't. Even on dyntick kernels, interrupts do happen several
> >times a second. Dynticks have nothing to do with disabling timer
> >interrupts...
> >
>
> That's true however if your system has 2 clock devices. One is the r4k-hpt
> and the other one soemthing else with a higher rating. If you don't stop
> r4k-hpt interrupts, how does it work ?
To some degree this question is hypothetic because generally the cp0
count/compare timer will be the highest rated counter.
But even if so, the basic solution is the same - just ignore the interrupt
whenever it happens to be triggered. Or if it isn't shared with an
active performance counter interrupt, you could even disable_irq() it.
Ralf
next prev parent reply other threads:[~2007-06-07 15:53 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-06 18:54 Tickless/dyntick kernel, highres timer and general time crapectomy Ralf Baechle
2007-06-06 19:04 ` Sergei Shtylyov
2007-06-06 19:04 ` Ralf Baechle
2007-06-06 19:04 ` Ralf Baechle
2007-06-07 7:59 ` Franck Bui-Huu
2007-06-07 8:49 ` Atsushi Nemoto
2007-06-07 11:30 ` Ralf Baechle
2007-06-07 13:11 ` Franck Bui-Huu
2007-06-07 13:43 ` Sergei Shtylyov
2007-06-07 14:44 ` Franck Bui-Huu
2007-06-07 14:49 ` Sergei Shtylyov
2007-06-07 15:48 ` Ralf Baechle [this message]
2007-06-08 8:29 ` Franck Bui-Huu
2007-06-08 9:41 ` Ralf Baechle
2007-06-08 14:22 ` Atsushi Nemoto
2007-06-07 15:02 ` Ralf Baechle
2007-06-07 15:14 ` Ralf Baechle
2007-06-08 9:07 ` Franck Bui-Huu
2007-06-08 9:57 ` Ralf Baechle
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