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Date: Fri, 8 Jun 2007 15:00:22 +0100
From: Thiemo Seufer <ths@networkno.de>
Subject: Re: [Qemu-devel] [PATCH, MIPS64] Fix Status_rw_bitmask values
Message-ID: <20070608140022.GE26587@networkno.de>
References: <20070604213747.GA8768@farad.aurel32.net>
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To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org

Aurelien Jarno wrote:
[snip]
> >> - 64-bit is implemented, the PX bit should be writable.
> > 
> > The current version is correct, R4000 and 5K don't implement PX, the
> > 20Kc and later CPUs do.
> 
> I don't know about R4000, but the 5K manual (from www.mips.com) clearly
> says that this bit is implemented. Also this bit is marked as "required"
> in the MIPS64 PRA manual (for both R1 and R2), and the 5K CPU is
> presented as a MIPS64R1 CPU.

Agreed for the 5K, I used too old Documentation to check this.


Thiemo