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Date: Mon, 20 Aug 2007 12:23:07 +0200
From: Andi Kleen <ak@suse.de>
To: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Cc: Andi Kleen <ak@suse.de>, patches@x86-64.org,
       Jeremy Fitzhardinge <jeremy@goop.org>, Zachary Amsden <zach@vmware.com>,
       Rusty Russell <rusty@rustcorp.com.au>, linux-kernel@vger.kernel.org,
       "S. P. Prasanna" <prasanna@in.ibm.com>,
       Chris Wright <chrisw@sous-sol.org>
Subject: Re: Non atomic unaligned writes
Message-ID: <20070820102306.GG16680@bingen.suse.de>
References: <200707191105.44056.ak@suse.de> <p73d4yow0ys.fsf@bingen.suse.de> <469FC9D4.5070604@goop.org> <200707192246.58047.ak@suse.de> <20070820005522.GA5069@Krystal>
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> Intel486???, Pentium??, or P6 family processors. The P6 family processors
> provide bus control signals that permit external memory subsystems to
> make split accesses atomic; however, nonaligned data accesses will

Normally in standard SMP systems between CPUs they are atomic AFAIK 
(modulo bugs) 

You're right -- i'm not sure about P5 SMP.

> seriously impact the performance of the processor and should be avoided
> where possible.

But they're also slow yes.

-Andi