From: Thiemo Seufer <ths@networkno.de>
To: linux-mips@linux-mips.org
Subject: [PATCH] Define known MIPS ISA overrides for sibyte and excite boards.
Date: Tue, 4 Sep 2007 15:55:43 +0100 [thread overview]
Message-ID: <20070904145543.GA9977@networkno.de> (raw)
Hello All,
the appended patch adds ISA overrides for excite and sibyte boards
(and fixes a mis-spelled comment).
Thiemo
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h
index 07f4322..107104c 100644
--- a/include/asm-mips/mach-excite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h
@@ -34,6 +34,11 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
+#define cpu_has_mips32r1 0
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
index 63d5bf6..1c1f924 100644
--- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
@@ -9,7 +9,7 @@
#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
/*
- * Sibyte are MIPS64 processors weired to a specific configuration
+ * Sibyte are MIPS64 processors wired to a specific configuration
*/
#define cpu_has_watch 1
#define cpu_has_mips16 0
@@ -33,6 +33,11 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
+#define cpu_has_mips32r1 1
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 1
+#define cpu_has_mips64r2 0
+
#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
reply other threads:[~2007-09-04 15:10 UTC|newest]
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