From: Ralf Baechle <ralf@linux-mips.org>
To: Winson Yung <winson.yung@gmail.com>
Cc: linux-mips@linux-mips.org
Subject: Re: branch delay slot
Date: Fri, 21 Sep 2007 17:08:43 +0100 [thread overview]
Message-ID: <20070921160843.GA21458@linux-mips.org> (raw)
In-Reply-To: <48413e3e0709210901g38e41164pf068f907596ebfeb@mail.gmail.com>
On Fri, Sep 21, 2007 at 09:01:15AM -0700, Winson Yung wrote:
> Hi there, in the following mips 32bit atomic cmp_xchg api, I was
> wondering why there is no nop after the two branch instructions. Does
> this introduce a bug, or is it a "feature" in the code to use the
> delay slot for an instructino to execut something whether or not they
> take the branch.
>
> #define __arch_compare_and_exchange_xxx_32_int(mem, newval, oldval, rel, acq) \
Manual filling of the delay slot is only required when the assembler is
in .set noreorder mode. Otherwise - and that's the default mode - it will
try do something sensible with the delay slot itself.
Ralf
prev parent reply other threads:[~2007-09-21 16:08 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-21 16:01 branch delay slot Winson Yung
2007-09-21 16:08 ` Ralf Baechle [this message]
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