[Qemu-devel] Another MIPS quiet NaN fix

[Daniel Jacobowitz <drow@false.org>]

Glibc's test-float failed on my qemu testing.  I tracked it down to
these routines: if you count the bits carefully, you'll see that
0x7FC00000 sets the quiet NaN bit (on most hardware - signalling NaN
in the MIPS case); so does a.high >> 41, which copies it from the
original NaN.  I think this routine should not force a quiet or
signalling NaN, but just preserve the input NaN's signalling-ness.

With the patch below, everything passes.  cvt.d.s still produces an
ugly pattern different from the one real hardware produces when
converting a single-precision NaN to double; but now it's a quiet
NaN if the input was a quiet NaN so exp10(NaN) no longer raises
Invalid.

-- 
Daniel Jacobowitz
CodeSourcery

--- fpu/softfloat-specialize.h	(revision 182529)
+++ fpu/softfloat-specialize.h	(local)
@@ -120,9 +120,7 @@ static commonNaNT float32ToCommonNaN( fl
 
 static float32 commonNaNToFloat32( commonNaNT a )
 {
-
-    return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
-
+    return ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 );
 }
 
 /*----------------------------------------------------------------------------
@@ -233,7 +231,7 @@ static float64 commonNaNToFloat64( commo
 
     return
           ( ( (bits64) a.sign )<<63 )
-        | LIT64( 0x7FF8000000000000 )
+        | LIT64( 0x7FF0000000000000 )
         | ( a.high>>12 );
 
 }