From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Iasor-0002Tg-48 for qemu-devel@nongnu.org; Thu, 27 Sep 2007 08:50:17 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Iasop-0002Rx-98 for qemu-devel@nongnu.org; Thu, 27 Sep 2007 08:50:16 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Iasoo-0002Rf-Ve for qemu-devel@nongnu.org; Thu, 27 Sep 2007 08:50:15 -0400 Received: from nan.false.org ([208.75.86.248]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Iasoo-0002oN-Bj for qemu-devel@nongnu.org; Thu, 27 Sep 2007 08:50:14 -0400 Received: from nan.false.org (localhost [127.0.0.1]) by nan.false.org (Postfix) with ESMTP id 869429832A for ; Thu, 27 Sep 2007 12:50:12 +0000 (GMT) Received: from caradoc.them.org (22.svnf5.xdsl.nauticom.net [209.195.183.55]) by nan.false.org (Postfix) with ESMTP id 6DF959829E for ; Thu, 27 Sep 2007 12:50:12 +0000 (GMT) Received: from drow by caradoc.them.org with local (Exim 4.67) (envelope-from ) id 1Iasol-0007lb-JN for qemu-devel@nongnu.org; Thu, 27 Sep 2007 08:50:11 -0400 Date: Thu, 27 Sep 2007 08:50:11 -0400 From: Daniel Jacobowitz Subject: Re: [Qemu-devel] softmmu macro meaning Message-ID: <20070927125011.GA29613@caradoc.them.org> References: <200709271039.46589.clemens.kol@gmx.at> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200709271039.46589.clemens.kol@gmx.at> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Thu, Sep 27, 2007 at 10:39:46AM +0200, Clemens Kolbitsch wrote: > does the MEMSUFFIX macro ("kernel" / "user") mean that the memory is access by > code running in ring0/ring3 or does this tell about the memory region being > access (mem < or > TASK_SIZE / 0xc0000000)? The former. > and while I'm asking two other related questions I just don't quite > understand: > > 1.) why does the TLB (e.g. tlb_table[CPU_MEM_INDEX][...]) have 2 different > arrays? is this because some CPU offer different page sizes depending on a > TASK_SIZE border or something?? It makes more sense if you realize it's kernel/user mode not address space. > 2.) the MMUSUFFIX macro ("mmu" / "cmmu") what does this stand for?? cmmu is used to read code to execute, IIRC (different permissions). -- Daniel Jacobowitz CodeSourcery