From: "Gerhard Pircher" <gerhard_pircher@gmx.net>
To: linuxppc-dev@ozlabs.org
Subject: 2.6.23-rc8 dies somewhere during boot!?
Date: Thu, 27 Sep 2007 21:12:33 +0200 [thread overview]
Message-ID: <20070927191233.201980@gmx.net> (raw)
[-- Attachment #1: Type: text/plain, Size: 661 bytes --]
Hi,
I'm working on a 2.6.23 kernel for the AmigaOne. I implemented the device
tree and the platform setup code, which all compiles fine. I built a
cuImage target, loaded it on my target machine with TFTP and booted it.
The kernel passes the platform setup code and then dies somewhere in the
driver init code (AFAICT), but before the keyboard driver is initialized
(thus magic sysrq key doesn't work). Can somebody help me to track down
this problem?
I tried to recover the kernel log buffer and attached it to this e-mail.
regards,
Gerhard
--
Psssst! Schon vom neuen GMX MultiMessenger gehört?
Der kanns mit allen: http://www.gmx.net/de/go/multimessenger
[-- Attachment #2: amigaone.dts --]
[-- Type: application/octet-stream, Size: 6146 bytes --]
/*
* AmigaOne Device Tree Source
*
* Copyright 2007 Gerhard Pircher (gerhard_pircher@gmx.net)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "AmigaOne";
compatible = "eyetech,amigaone","mai-logic,teron";
coherency-off;
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
timebase-frequency = <0>; // 33.3 MHz, from U-boot
clock-frequency = <0>; // From U-boot
bus-frequency = <0>; // From U-boot
32-bit;
};
};
memory {
device_type = "memory";
reg = <0 0>; // From U-boot
};
pci@80000000 {
device_type = "pci";
compatible = "mai-logic,articia-s";
bus-frequency = <01fca055>; // 33.3MHz
bus-range = <0 ff>;
ranges = <01000000 0 00000000 fe000000 0 00c00000 // PCI I/O
02000000 0 80000000 80000000 0 7d000000 // PCI memory
02000000 0 fd000000 fd000000 0 01000000>; // PCI alias memory
interrupt-parent = <&i8259>;
8259-interrupt-acknowledge = <fef00000>;
#interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
host@0 {
compatible = "pciclass,0600";
vendor-id = <000010cc>;
device-id = <00000660>;
revision-id = <00000001>;
class-code = <00060000>;
subsystem-id = <0>;
subsystem-vendor-id = <0>;
devsel-speed = <00000001>;
66mhz-capable;
min-grant = <0>;
max-latency = <0>;
// AGP aperture is unset.
reg = <42000010 0 00000000 0 00400000>;
assigned-addresses = <42000010 0 00000000 0 00400000>;
};
isa@7 {
device_type = "isa";
compatible = "pciclass,0601";
vendor-id = <00001106>;
device-id = <00000686>;
revision-id = <00000010>;
class-code = <00060100>;
subsystem-id = <0>;
subsystem-vendor-id = <0>;
devsel-speed = <00000001>;
min-grant = <0>;
max-latency = <0>;
/* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
ranges = <00000001 0 01000000 0 00000000 00010000>;
interrupt-parent = <&i8259>;
#interrupt-cells = <2>;
#address-cells = <2>;
#size-cells = <1>;
dma-controller@0 {
device_type = "dma-controller";
compatible = "pnpPNP,200";
reg = <00000001 00000000 00000020
00000001 00000080 00000010
00000001 000000c0 00000020>;
/* Channel 4 reserverd, cascade mode, 2x32k transfer/counter
* widths and bus master capability. Is this really necessary?
*/
/* dma = <4 4 20 20 1>; */
};
i8259: interrupt-controller@20 {
device_type = "interrupt-controller";
compatible = "pnpPNP,000";
interrupt-controller;
reg = <00000001 00000020 00000002
00000001 000000a0 00000002
00000001 000004d0 00000002>;
reserved-interrupts = <2>;
};
timer@40 {
/* device_type = "timer"; */ // No device type binding for now.
compatibe = "pnpPNP,100"; // Also add pcspkr to platform devices.
reg = <00000001 00000040 00000020>;
};
8042@60 {
device_type = "8042";
reg = <00000001 00000060 00000001
00000001 00000064 00000001>;
interrupts = <1 3 c 3>; // IRQ1, IRQ12 (rising edge)
#address-cells = <1>;
#size-cells = <0>;
keyboard@0 {
device_type = "keyboard";
compatible = "pnpPNP,303";
reg = <0>;
};
mouse@1 {
device_type = "mouse";
compatible = "pnpPNP,f03";
reg = <1>;
};
};
rtc@70 {
device_type = "rtc";
compatible = "pnpPNP,b00";
reg = <00000001 00000070 00000002>;
interrupts = <8 3>;
};
serial@2f8 {
device_type = "serial";
compatible = "pnpPNP,501","pnpPNP,500"; // "ns16550"; add property check to OF serial code.
reg = <00000001 000002f8 00000008>;
interrupts = <3 3>; // IRQ3 (rising edge)
clock-frequency = <0>; // Not necessary?
};
serial@3f8 {
device_type = "serial";
compatible = "pnpPNP,501","pnpPNP,500"; // "ns16550"; add property check to OF serial code.
reg = <00000001 000003f8 00000008>;
interrupts = <4 3>; // IRQ4 (rising edge)
clock-frequency = <0>; // Not necessary?
};
parallel@378 {
device_type = "parallel";
compatible = "pnpPNP,400"; // "pnpPNP,401" // No ECP support for now.
reg = <00000001 00000378 00000003
00000001 00000778 00000003>;
/* interrupts = <7>; */
/* dma = <3 0 0 0>; */ // Parallel port DMA mode?
};
fdc@3f0 {
device_type = "fdc";
compatible = "pnpPNP,700";
reg = <00000001 000003f0 00000008>;
interrupts = <6 3>; // IRQ6 (rising edge)
/* dma = < >; */ // Floppy DMA mode?
#address-cells = <1>;
#size-cells = <0>;
disk@0 {
device_type = "block";
reg = <0>;
};
};
};
ide@7,1 {
compatible = "pciclass,01018f";
vendor-id = <00001106>;
device-id = <00000571>;
revision-id = <00000006>;
// Class code with PCI IDE programming interface indicator.
class-code = <0001018f>;
subsystem-id = <0>;
subsystem-vendor-id = <0>;
devsel-speed = <00000001>;
min-grant = <0>;
max-latency = <0>;
fast-back-to-back;
// Assume base addresses are relocateable, even if
// controller operates in compatibility mode.
reg = <21003910 0 00000000 0 00000000
21003914 0 00000000 0 00000000
21003918 0 00000000 0 00000000
2100391c 0 00000000 0 00000000
21003920 0 00000000 0 00000000>;
assigned-addresses = <01003910 0 000001f0 0 00000008
01003914 0 000003f4 0 00000004
01003918 0 00000170 0 00000008
0100391c 0 00000374 0 00000004
01003920 0 0000cc00 0 00000010>;
interrupt-parent = <&i8259>;
interrupts = <e 3 f 3>;
#interrupt-cells = <2>;
};
};
chosen {
linux,stdout-path = "/pci@80000000/isa@7/serial@2f8";
};
};
[-- Attachment #3: setup.c --]
[-- Type: text/x-csrc, Size: 6285 bytes --]
/*
* AmigaOne platform setup
*
* Copyright 2007 Gerhard Pircher (gerhard_pircher@gmx.net)
*
* Based on original amigaone_setup.c source code
* Copyright 2003 by Hans-Jörg and Thomas Frieden
* and chrp/setup.c
* Copyright 1995 by Linus Torvalds
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/ide.h>
#include <linux/pci.h>
#include <linux/utsrelease.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/timer.h>
#include <asm/cputable.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/pci-bridge.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/sections.h>
#include <asm/time.h>
#include <asm/i8259.h>
#include <asm/system.h>
#include <asm/udbg.h>
#include <asm/vga.h>
extern void amigaone_find_bridges(void);
void amigaone_set_l2cr(void)
{
/* This disables the L2 hardware prefetch. It is normally disabled and
* enabled again within _set_L2CR(), but the L2 prefetch enable is not
* compiled in for the AmigaOne.
*/
_set_L2CR(_get_L2CR());
if(((_get_L2CR() & L2CR_L2E) == 0) && (strstr(cmd_line, "l2cr=") == NULL))
{
printk("AmigaOne l2cr : L2 cache was not active, activating.\n");
_set_L2CR(0);
_set_L2CR(L2CR_L2E | L2CR_L2PE);
}
}
int amigaone_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
const char *model = "";
root = of_find_node_by_path("/");
if (root)
model = of_get_property(root, "model", NULL);
seq_printf(m, "machine\t\t: %s\n", model);
of_node_put(root);
seq_printf(m, "msscr0\t\t: 0x%08lX\n", mfspr(SPRN_MSSCR0));
return 0;
}
void __init amigaone_setup_arch(void)
{
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000/HZ;
#ifdef CONFIG_BLK_DEV_INITRD
/* this is fine for chrp */
initrd_below_start_ok = 1;
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel or OS4) */
/* Enable the L2 cache. */
amigaone_set_l2cr();
/* Lookup PCI host bridges */
/* setup PCI host bridge */
#ifdef CONFIG_PCI_HOST_DRIVER
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
articias_setup_pci(np);
#else
amigaone_find_bridges();
#endif
/* Uncomment, when U-boot was updated. */
// pci_create_OF_bus_map();
/* vgacon.c needs to know where VGA memory is mapped. */
// vgacon_remap_base = (unsigned long) ioremap(0xfd000000, 0x01000000);
// conswitchp = &vga_con;
if (ppc_md.progress)
ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
}
void __init amigaone_init_IRQ(void)
{
struct device_node *np, *pic = NULL;
unsigned long amigaone_int_ack = 0;
/* Search for ISA interrupt controller. */
for_each_node_by_type(np, "interrupt-controller")
if (of_device_is_compatible(np, "pnpPNP,000")) {
pic = np;
break;
}
BUG_ON(pic == NULL);
/* Look for interrupt acknowledge address in the PCI root node. */
for_each_node_by_name(np, "pci") {
const unsigned int *addrp = of_get_property(np,
"8259-interrupt-acknowledge", NULL);
if (addrp == NULL)
continue;
amigaone_int_ack = addrp[of_n_addr_cells(np)-1];
break;
}
of_node_put(np);
if (np == NULL)
printk(KERN_WARNING "Cannot find PCI interrupt acknowledge"
" address, polling\n");
i8259_init(pic, amigaone_int_ack);
ppc_md.get_irq = i8259_irq;
irq_set_default_host(i8259_get_host());
}
void __init amigaone_init(void)
{
#ifdef CONFIG_NVRAM
// amigaone_nvram_init();
#endif
request_region(0x20,0x20,"pic1");
request_region(0xa0,0x20,"pic2");
request_region(0x00,0x20,"dma1");
request_region(0x40,0x20,"timer");
request_region(0x80,0x10,"dma page reg");
request_region(0xc0,0x20,"dma2");
}
/* Copied from U-Boot. */
static inline void soft_restart(unsigned long addr)
{
/* SRR0 has system reset vector, SRR1 has default MSR value.
* rfi restores MSR from SRR1 and sets the PC to the SRR0 value.
*/
__asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
__asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
__asm__ __volatile__ ("mtspr 27, 4");
__asm__ __volatile__ ("rfi");
/* Not reached. */
while(1);
}
void amigaone_restart(char *cmd)
{
unsigned long addr;
local_irq_disable();
/* Flush and disable I/D cache. */
__asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
__asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
__asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
__asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
__asm__ __volatile__ ("sync");
__asm__ __volatile__ ("mtspr 1008, 4");
__asm__ __volatile__ ("isync");
__asm__ __volatile__ ("sync");
__asm__ __volatile__ ("mtspr 1008, 5");
__asm__ __volatile__ ("isync");
__asm__ __volatile__ ("sync");
addr = 0xfff00100;
soft_restart(addr);
while(1);
}
static int __init amigaone_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) {
/* Coherent memory access cause complete system lockup! Thus
* remove it in any case, even if the CPU needs it. We'll
* disable the L2 cache prefetch later on.
*/
cur_cpu_spec->cpu_features &= ~CPU_FTR_NEED_COHERENT;
ISA_DMA_THRESHOLD = 0x00FFFFFF;
DMA_MODE_READ = 0x44;
DMA_MODE_WRITE = 0x48;
return 1;
}
return 0;
}
define_machine(amigaone) {
.name = "AmigaOne",
.probe = amigaone_probe,
.setup_arch = amigaone_setup_arch,
.init = amigaone_init,
.show_cpuinfo = amigaone_show_cpuinfo,
.init_IRQ = amigaone_init_IRQ,
.restart = amigaone_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
.phys_mem_access_prot = pci_phys_mem_access_prot,
};
[-- Attachment #4: pci.c --]
[-- Type: text/x-csrc, Size: 1894 bytes --]
/*
* AmigaOne platform PCI setup
*
* Copyright 2007 Gerhard Pircher (gerhard_pircher@gmx.net)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/machdep.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
void __init
amigaone_find_bridges(void)
{
struct device_node *dev;
const int *bus_range;
int len, index = -1;
struct pci_controller *hose;
struct device_node *root = of_find_node_by_path("/");
for (dev = root->child; dev != NULL; dev = dev->sibling) {
if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
continue;
++index;
bus_range = of_get_property(dev, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
printk(KERN_WARNING "Can't get bus-range for %s\n",
dev->full_name);
continue;
}
/* if (bus_range[1] == bus_range[0])
printk(KERN_INFO "PCI bus %d", bus_range[0]);
else
printk(KERN_INFO "PCI buses %d..%d",
bus_range[0], bus_range[1]);
printk(" controlled by %s", dev->full_name); */
hose = pcibios_alloc_controller(dev);
if (!hose) {
printk("Can't allocate PCI controller structure for %s\n",
dev->full_name);
continue;
}
hose->arch_data = dev;
hose->first_busno = bus_range[0];
hose->last_busno = bus_range[1];
setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc, 0);
/* Interpret the "ranges" property */
/* This also maps the I/O region and sets isa_io/mem_base. */
pci_process_bridge_OF_ranges(hose, dev, index == 0);
}
of_node_put(root);
}
[-- Attachment #5: syslog.log --]
[-- Type: text/x-log, Size: 3349 bytes --]
<6>Using AmigaOne machine description.
<4>Total memory = 1536MB; using 4096kB for hash table (at cfc00000).
<5>Linux version 2.6.23-rc8 (geri@earth) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #11 Wed Sep 26 22:35:58 CEST 2007.
<4> -> find_legacy_serial_port().
<4>stdout is /pci@80000000/isa@7/serial@2f8.
<4> -> add_legacy_isa_port(/pci@80000000/isa@7/serial@2f8).
<7>Found legacy serial port 0 for /pci@80000000/isa@7/serial@2f8.
<7> port=2f8, taddr=fe0002f8, irq=0, clk=1843200,speed=0.
<4> -> add_legacy_isa_port(/pci@80000000/isa@7/serial@3f8).
<7>Found legacy serial port 1 for /pci@80000000/isa@7/serial@3f8.
<7> port=3f8, taddr=fe0003f8, irq=0, clk=1843200, speed=0.
<4>legacy_serial_console = 0.
<4>default console speed = 115200.
<4> <- find_legacy_serial_port().
<6>console [udbg0] enabled.
<7>Entering add_active_range(0, 0, 393216) 0 entries of 256 used.
<4>AmigaOne l2cr : L2 cache was not active, activating..
<4>PCI: IO 0x0 -> 0xbfffff.
<4>PCI: MEM[0] 0x80000000 -> 0xfdffffff.
<7>Top of RAM: 0x60000000, Total RAM: 0x60000000.
<7>Memory hole size: 0MB.
<4>Zone PFN ranges:.
<4> DMA 0 -> 196608.
<4> Normal 196608 -> 196608.
<4> HighMem 196608 -> 393216.
<4>Movable zone start PFN for each node.
<4>early_node_map[1] active PFN ranges.
<4> 0: 0 -> 393216.
<7>On node 0 totalpages: 393216.
<7> DMA zone: 1536 pages used for memmap.
<7> DMA zone: 0 pages reserved.
<7> DMA zone: 195072 pages, LIFO batch:31.
<7> Normal zone: 0 pages used for memmap.
<7> HighMem zone: 1536 pages used for memmap.
<7> HighMem zone: 195072 pages, LIFO batch:31.
<7> Movable zone: 0 pages used for memmap.
<4>Built 1 zonelists in Zone order. Total pages: 390144.
<5>Kernel command line: root=/dev/hda11 console=udbg0 console=/dev/ttyS0,115200n8.
<7>i8259_host_map(1, 0x1).
<7>i8259_host_map(2, 0x2).
<7>i8259_host_map(3, 0x3).
<7>i8259_host_map(4, 0x4).
<7>i8259_host_map(5, 0x5).
<7>i8259_host_map(6, 0x6).
<7>i8259_host_map(7, 0x7).
<7>i8259_host_map(8, 0x8).
<7>i8259_host_map(9, 0x9).
<7>i8259_host_map(10, 0xa).
<7>i8259_host_map(11, 0xb).
<7>i8259_host_map(12, 0xc).
<7>i8259_host_map(13, 0xd).
<7>i8259_host_map(14, 0xe).
<7>i8259_host_map(15, 0xf).
<7>irq: Allocated host of type 0 @0xc04b5080.
<6>i8259 legacy interrupt controller initialized.
<7>irq: Default host set to @0xc04b5080.
<4>PID hash table entries: 4096 (order: 12, 16384 bytes).
<7>time_init: decrementer frequency = 33.333333 MHz.
<7>time_init: processor frequency = 800.000000 MHz.
<4> -> check_legacy_serial_console().
<4> console was specified !.
<4>Console: colour dummy device 80x25.
<6>Dentry cache hash table entries: 131072 (order: 7, 524288 bytes).
<6>Inode-cache hash table entries: 65536 (order: 6, 262144 bytes).
<7>High memory: 786432k.
<6>Memory: 1549564k/1572864k available (3416k kernel code, 808700k reserved, 152k data, 1182k bss, 176k init).
<7>Calibrating delay loop... 66.56 BogoMIPS (lpj=133120).
<6>Security Framework v1.0.0 initialized.
<6>SELinux: Disabled at boot..
<6>Capability LSM initialized.
<4>Mount-cache hash table entries: 512.
<4>khelper used greatest stack depth: 7316 bytes left.
<6>NET: Registered protocol family 16.
...
...4 bytes left.
<6>PCI: Probing PCI hardware.
<7>PCI: Scanning bus 0...
...00:00:07.0.
<7>PCI: Calling quirk...
...CI: Found 0000:00:07.2 [1106/303...
next reply other threads:[~2007-09-27 19:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-27 19:12 Gerhard Pircher [this message]
2007-09-27 19:25 ` 2.6.23-rc8 dies somewhere during boot!? Linas Vepstas
2007-09-27 19:31 ` Gerhard Pircher
2007-09-27 20:50 ` Linas Vepstas
2007-09-27 21:17 ` Gerhard Pircher
2007-09-27 21:35 ` Linas Vepstas
2007-09-27 21:57 ` Gerhard Pircher
2007-09-27 22:20 ` Linas Vepstas
2007-09-27 22:27 ` Gerhard Pircher
2007-09-27 22:39 ` Benjamin Herrenschmidt
2007-09-27 23:31 ` Paul Mackerras
2007-09-28 9:53 ` Gerhard Pircher
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