From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1IgptR-0002tn-LR
	for qemu-devel@nongnu.org; Sat, 13 Oct 2007 18:55:37 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1IgptQ-0002sv-PR
	for qemu-devel@nongnu.org; Sat, 13 Oct 2007 18:55:37 -0400
Received: from [199.232.76.173] (helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1IgptQ-0002sm-KR
	for qemu-devel@nongnu.org; Sat, 13 Oct 2007 18:55:36 -0400
Received: from relay01.mx.bawue.net ([193.7.176.67])
	by monty-python.gnu.org with esmtps
	(TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60)
	(envelope-from <ths@networkno.de>) id 1IgptQ-0006MQ-2N
	for qemu-devel@nongnu.org; Sat, 13 Oct 2007 18:55:36 -0400
Date: Sat, 13 Oct 2007 23:55:32 +0100
From: Thiemo Seufer <ths@networkno.de>
Subject: Re: [Qemu-devel] RFC: cleanups: CPU_MEM_INDEX
Message-ID: <20071013225532.GQ3379@networkno.de>
References: <1191958401.9976.87.camel@rapid>
	<20071010001238.GA3379@networkno.de>
	<1191992777.9976.171.camel@rapid> <1192104597.9976.214.camel@rapid>
	<1192172462.9976.248.camel@rapid> <1192310092.9976.350.camel@rapid>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <1192310092.9976.350.camel@rapid>
Reply-To: qemu-devel@nongnu.org
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: "J. Mayer" <l_indien@magic.fr>
Cc: qemu-devel@nongnu.org

J. Mayer wrote:
[snip]
> > > > > Other than that it looks good to me (and reminds me to check what the
> > > > > supervisor mode on MIPS actually does now :-).
> > > > 
> > > > This updated patch gives the opportunity to define a per-target semantic
> > > > of the mmu_idx... Time to check what it means in actual CPU
> > > > implementation !!!! ;-)
> > > > 
> > > > Thanks in advance for any comments or improvment suggestions....
> 
> What about this proposal ?
> Any remarks, bugs, ... ?
> I'd really like to apply it and go on working on some other
> improvments...

Please commit.

> And I'd like to commit my provision code for hypervisor mode for PowerPC
> and the 4 running modes for Alpha, which depend on this one.
> (the patch is still the same than the last one I did post here).


Thiemo