From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Christoph Egger" <Christoph.Egger@amd.com>
Subject: [PATCH] new machine check MSRs
Date: Tue, 23 Oct 2007 17:07:38 +0200
Message-ID: <200710231707.38816.Christoph.Egger@amd.com>
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Hi!

Attached patch adds machine check MSRs introduced in AMD Family 0x10=20
(Barcelona).

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>

=2D-=20
AMD Saxony, Dresden, Germany
Operating System Research Center

Legal Information:
AMD Saxony Limited Liability Company & Co. KG
Sitz (Gesch=E4ftsanschrift):
   Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland
Registergericht Dresden: HRA 4896
vertretungsberechtigter Komplement=E4r:
   AMD Saxony LLC (Sitz Wilmington, Delaware, USA)
Gesch=E4ftsf=FChrer der AMD Saxony LLC:
   Dr. Hans-R. Deppe, Thomas McCoy

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diff -r b28ae5f00553 xen/include/asm-x86/msr-index.h
--- a/xen/include/asm-x86/msr-index.h	Tue Oct 23 09:26:43 2007 +0100
+++ b/xen/include/asm-x86/msr-index.h	Tue Oct 23 17:03:09 2007 +0200
@@ -172,6 +172,11 @@
 /* MSR_K8_VM_CR bits: */
 #define _K8_VMCR_SVME_DISABLE		4
 #define K8_VMCR_SVME_DISABLE		(1 << _K8_VMCR_SVME_DISABLE)
+
+/* AMD Family10h machine check MSRs */
+#define MSR_F10_MC4_MISC1		0xC0000408
+#define MSR_F10_MC4_MISC2		0xC0000409
+#define MSR_F10_MC4_MISC3		0xC000040A
 
 /* K6 MSRs */
 #define MSR_K6_EFER			0xc0000080

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