From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Jan Nikitenko <jan.nikitenko@gmail.com>,
linux-mips@linux-mips.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH] serial: fix au1xxx UART0 irq setup
Date: Thu, 25 Oct 2007 17:41:03 +0100 [thread overview]
Message-ID: <20071025164103.GA25206@linux-mips.org> (raw)
In-Reply-To: <Pine.LNX.4.64N.0710251548080.24086@blysk.ds.pg.gda.pl>
On Thu, Oct 25, 2007 at 03:57:01PM +0100, Maciej W. Rozycki wrote:
> > That said, irq 0 is imho totally valid (take the good old PIT timer
> > interrupt of the PC as the classic example) and treating it as an invalid
> > interrupt number is broken.
>
> I would rather -1 stood for the invalid IRQ number -- unlike with 0
> chances are nobody will need 4G of interrupt lines or vectors (as
> applicable) in a single system. We sort of escape the problem with the
> MIPS processors because the IP0 bit of the Cause register is a software
> interrupt that is not used by devices, but still some platforms bypass the
> built-in interrupt "controller" as only a single source is used in the
> Cause register and want to start the numbering of lines in the external
> controller from 0.
Time to convert those platforms to irq_cpu.c as well.
Anyway, I recall there was an argument against using -1 as the invalid
irq number - but since -1 is not a valid index into the irq_desc array
for example I would consider such use broken. But does anybody recall
the details?
Ralf
next prev parent reply other threads:[~2007-10-25 16:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-25 13:58 [PATCH] serial: fix au1xxx UART0 irq setup Jan Nikitenko
2007-10-25 14:09 ` Ralf Baechle
2007-10-25 14:47 ` Jan Nikitenko
2007-10-25 14:57 ` Maciej W. Rozycki
2007-10-25 16:41 ` Ralf Baechle [this message]
2007-10-25 14:09 ` Sergei Shtylyov
2007-10-29 15:28 ` Ralf Baechle
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