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From: Laurent Pinchart <laurentp@cse-semaphore.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] BRGs on ep8248 after updating CLKIN
Date: Fri, 30 Nov 2007 10:19:31 +0100	[thread overview]
Message-ID: <200711301019.35167.laurentp@cse-semaphore.com> (raw)
In-Reply-To: <bfa0697f0711291439h363139frb3c95158d671cd4b@mail.gmail.com>

On Thursday 29 November 2007 23:39, Alan Bennett wrote:
> Ok, I don't know what I was thinking.  Yes, it's 66 MHz.
>
> The only thing I can see is in the calculation for BUS_CLK
>       speed.c   =   gd->bus_clk = clkin;
>
> However, looking at the Ref Manual for the 8272, Figure 10-1,
>    It shows a conflict:
>         1. MAIN_PLL = 66MHz * (SCMR[pllmf]+1) = 66MHz*(5+1) = 396 MHz
>         2. BUSCLK = MAIN_PLL/(SCMR[busdf]+1) = 396MHz /(3+1) = 99 MHz
>         and then
>         BUS_CLK = SCMR[corecnf] multiplier 1E=3.5*BUS_CLK
>
> BUT CLKIN != BUS_CLK  (66MHz != 99MHz)
>
> So could it be
> 		gd->cpu_clk = (gd->bus_clk * cp->b2c_mult) / 2;
> instead of
> 		gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
>
> -Alan
>
> On 11/29/07, Jerry Van Baren <gerald.vanbaren@ge.com> wrote:
> > Alan Bennett wrote:
> > > When I originally supported my ep8248-style board, I had
> > > #define CONFIG_8260_CLKIN     66000000        /* in Hz */

If I'm not mistaken, your 66 MHz oscillator runs at 200/3 MHz, so 
CONFIG_8260_CLKIN should be set to 66666666.

> > > However, I noticed (after far too much time had passed) that my cpu
> > > speed wasn't matching my expectations.  (reported 230 MHz, and
> > > expected 350 MHz).
> > >
> > > This was rather easily fixed by changing the CONFIG_8260_CLKIN to 100
> > > MHz: #define CONFIG_8260_CLKIN     100000000       /* in Hz */
> > >
> > > However, my BRGs / SMC1 uart is now broke(baud-rate mismatch).  Does
> > > anyone have experience with this section of u-boot that could help me
> > > out?
> > >
> > > My BRG7 is configured by u-boot(1.3+) = 0x00010078 ~ CD = 60 (0x3c).
> > > And there is an apparent baud-rate mismatch and all the output is
> > > garbled now.  (with a scope I measured ~ 25.5 / 26 K, when I'm
> > > expecting 38.4k)
> > >
> > > I think I'm missing something in the equation, but I'm not sure where
> > > it is.  If I simply update the CD to be 162 (162*38400*16 = 99,532,800
> > > ~ 100 MHz) the serial port is still dead.
> > >
> > > Any ideas?
> >
> > Hi Alan,
> >
> > I suspect that your clock is really 66MHz (read it off the crystal, that
> > is the definitive authority).  Generally BRGs don't lie - if your
> > CONFIG_8260_CLKIN doesn't match the actual crystal, your baud rate is
> > going to be wrong.  Your baud rate is right when CONFIG_8260_CLKIN is
> > set to 66MHz and wrong when set to 100MHz - pretty strong evidence.
> >
> > My theory is that your crystal is 66MHz but your CPU multiplier is
> > misconfigured.  In the 8260 the CPU multiplier is selected by the HRCW
> > (MODCK_H) _and_ some physical pins on the CPU (MODCK[1-3]) - your 8248
> > may be different.

Best regards,

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chauss?e de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
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  reply	other threads:[~2007-11-30  9:19 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-11-29 20:43 [U-Boot-Users] BRGs on ep8248 after updating CLKIN Alan Bennett
2007-11-29 21:00 ` Jerry Van Baren
2007-11-29 22:39   ` Alan Bennett
2007-11-30  9:19     ` Laurent Pinchart [this message]
2007-11-30 14:37       ` Alan Bennett
2007-11-30  1:13 ` Erik Christiansen
2007-11-30  5:51   ` Alan Bennett

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