[Qemu-devel] [PATCH] r2d: Add R2D-PLUS FPGA support.

[Paul Mundt <lethal@linux-sh.org>]

This adds trivial support for the R2D-PLUS FPGA, mostly just for the
versioning information that the kernel uses for IRL mappings, in addition
to handling the heartbeat and poweroff writes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

---

 hw/r2d.c |   96 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)

Index: hw/r2d.c
===================================================================
RCS file: /sources/qemu/qemu/hw/r2d.c,v
retrieving revision 1.6
diff -u -p -r1.6 r2d.c
--- hw/r2d.c	18 Nov 2007 08:46:58 -0000	1.6
+++ hw/r2d.c	3 Dec 2007 09:28:05 -0000
@@ -30,6 +30,101 @@
 #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
 #define SDRAM_SIZE 0x04000000
 
+#define PA_POWOFF	0x30
+#define PA_VERREG	0x32
+#define PA_OUTPORT	0x36
+
+typedef struct {
+	target_phys_addr_t base;
+
+	uint16_t bcr;
+	uint16_t irlmon;
+	uint16_t cfctl;
+	uint16_t cfpow;
+	uint16_t dispctl;
+	uint16_t sdmpow;
+	uint16_t rtcce;
+	uint16_t pcicd;
+	uint16_t voyagerrts;
+	uint16_t cfrst;
+	uint16_t admrts;
+	uint16_t extrst;
+	uint16_t cfcdintclr;
+	uint16_t keyctlclr;
+	uint16_t pad0;
+	uint16_t pad1;
+	uint16_t powoff;
+	uint16_t verreg;
+	uint16_t inport;
+	uint16_t outport;
+	uint16_t bverreg;
+} r2d_fpga_t;
+
+static uint32_t r2d_fpga_readw(void *opaque, target_phys_addr_t addr)
+{
+	r2d_fpga_t *s = opaque;
+
+	addr -= s->base;
+
+	switch (addr) {
+	case PA_OUTPORT:
+		return s->outport;
+	case PA_POWOFF:
+		return s->powoff;
+	case PA_VERREG:
+		return 0x10;
+	}
+
+	return 0;
+}
+
+static void
+r2d_fpga_writew(void *opaque, target_phys_addr_t addr, uint32_t value)
+{
+	r2d_fpga_t *s = opaque;
+
+	addr -= s->base;
+
+	switch (addr) {
+	case PA_OUTPORT:
+		s->outport = value;
+		break;
+	case PA_POWOFF:
+		s->powoff = value;
+		break;
+	case PA_VERREG:
+		/* Discard writes */
+		break;
+	}
+}
+
+static CPUReadMemoryFunc *r2d_fpga_readfn[] = {
+	r2d_fpga_readw,
+	r2d_fpga_readw,
+	r2d_fpga_readw,
+};
+
+static CPUWriteMemoryFunc *r2d_fpga_writefn[] = {
+	r2d_fpga_writew,
+	r2d_fpga_writew,
+	r2d_fpga_writew,
+};
+
+static void r2d_fpga_init(uint32_t base)
+{
+	int iomemtype;
+	r2d_fpga_t *s;
+
+	s = qemu_mallocz(sizeof(r2d_fpga_t));
+	if (!s)
+		return;
+
+	s->base = base;
+	iomemtype = cpu_register_io_memory(0, r2d_fpga_readfn,
+					   r2d_fpga_writefn, s);
+	cpu_register_physical_memory(base, 0x40, iomemtype);
+}
+
 static void r2d_init(int ram_size, int vga_ram_size,
               const char *boot_device, DisplayState * ds,
 	      const char *kernel_filename, const char *kernel_cmdline,
@@ -50,6 +145,7 @@ static void r2d_init(int ram_size, int v
     /* Allocate memory space */
     cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0);
     /* Register peripherals */
+    r2d_fpga_init(0x04000000);
     s = sh7750_init(env);
     /* Todo: register on board registers */
     {