From: Paul Walmsley <paul@pwsan.com>
To: linux-omap-open-source@linux.omap.com, linux-omap@vger.kernel.org
Subject: [PATCH 3/3] 24xx clock: Fix 54MHz APLL readiness test
Date: Mon, 03 Dec 2007 16:24:29 -0700 [thread overview]
Message-ID: <20071203232727.752667192@pwsan.com> (raw)
In-Reply-To: 20071203232426.775904267@pwsan.com
[-- Attachment #1: fix_apll_54m_readiness_test.patch --]
[-- Type: text/plain, Size: 877 bytes --]
omap2_clk_fixed_enable() was checking the wrong bit to determine if
the 54MHz APLL was ready, causing a "Clock apll54_ck didn't enable in
100000 tries" warning message on 2430SDP:
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock24xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux-omap/arch/arm/mach-omap2/clock24xx.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/clock24xx.c 2007-11-21 00:26:06.000000000 -0700
+++ linux-omap/arch/arm/mach-omap2/clock24xx.c 2007-12-03 16:07:46.000000000 -0700
@@ -115,7 +115,7 @@
if (clk == &apll96_ck)
cval = OMAP24XX_ST_96M_APLL;
else if (clk == &apll54_ck)
- cval = OMAP24XX_ST_54M_CLK;
+ cval = OMAP24XX_ST_54M_APLL;
omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
clk->name);
--
next prev parent reply other threads:[~2007-12-03 23:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-03 23:24 [PATCH 0/3] 24xx clock fixes: DSP, 54MHz APLL Paul Walmsley
2007-12-03 23:24 ` [PATCH 1/3] 2430 clock: remove redundant iva2_1_fck Paul Walmsley
2007-12-03 23:24 ` [PATCH 2/3] 24xx clock: clarify clock structure; correct parent clock Paul Walmsley
2007-12-03 23:24 ` Paul Walmsley [this message]
2007-12-05 22:39 ` [PATCH 0/3] 24xx clock fixes: DSP, 54MHz APLL Tony Lindgren
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