Re: [Xenomai-help] PIOX irq problems with at91sam9260

[Juan Antonio Garcia Redondo <juan-antonio.garcia@domain.hid>]

On 28/12/07 11:02, Gilles Chanteperdrix wrote:
> On Dec 28, 2007 9:29 AM, Juan Antonio Garcia Redondo
> <juan-antonio.garcia@domain.hid> wrote:
> > On 26/12/07 22:51, Gilles Chanteperdrix wrote:
> > > Juan Antonio Garcia Redondo wrote:
> > >  > I've found a workaround for my problem, but I'm not sure if is the
> > >  > correct solution.
> > >  >
> > >  > First, my test program test_irq.c had an error, after request the irq,
> > >  > it have be enabled; anyway the problem persists because the
> > >  > __ipipe_mach_demux_irq find the irq disabled (gpio->depth = 1).
> > >
> > > You should not have to enable irqs, this should be done automatically
> > > when requesting the irq. Which irq did you have to enable, the gpio irq
> > > ? Or the multiplexed one ?
> >
> > I'm using the PIOB_11 as gpio and programming it as input before run the
> > test_irq.
> > I have to enable the irq by mean of rt_intr_enable,
> 
> You say "the irq", but there are really two irqs involved: the
> multiplexed irq, and the decoded irq, which one are you talking about
> ?
OK, when I say "the irq" I'm talking about the irq number associated to
the gpio, not the irq associated to the port. That's to say, from linux side:

	request_irq(75, testlat_irq_handler, IRQF_DISABLED, "testlat", &testlat);

>From xenomai side:
    	rt_intr_create(&intr_desc,"MyIrq",75,0);
    	rt_intr_enable(&intr_desc);

The 75 number comes from AT91_PIN_PB11 = NR_AIC_IRQS(32) + 0x20(Port B) + 11


> > otherwise the
> > correspondent bit of IMR (Interrupt Mask Register) is disabled. Moreover
> > the rt_intr_create documentation says:
> >
> > Note:
> >         The interrupt source associated to the interrupt descriptor remains
> >         masked upon creation. rt_intr_enable() should be called for the new
> >         interrupt object to unmask it.
> 
> It seems that when requesting an interrupt with the RTDM skin, it is
> not necessary to enable it, but it is still necessary with the native
> skin.
> 
> >
> > Anyway, I would like to know your opinion about my patch. As I said in
> > my previous mail, althought the irq is enabled, the correspondent
> > handler is not called because the __ipipe_mach_demux_irq function
> > (arch/arm/mach-at91rm9200/gpio.c) asks for the depth field of the struct irq_desc.
> >
> >         if (isr & 1) {
> >                 if (unlikely(gpio->depth)) {
> >                         /*
> >                          * The core ARM interrupt
> >                          * handler lazily disables IRQs
> >                          * so
> >                          * another IRQ must be generated
> >                          * before it actually gets
> >                          * here to be disabled on the
> >                          * GPIO controller.
> >                          */
> >                         gpio_irq_mask(pin);
> >                         }
> >                 else
> >                         __ipipe_handle_irq(pin, regs);
> >                 }
> >
> > I've attached the patch again because the previous patch had an error.
> 
> I will look at your patch.
> 

Regards,
	Juan Antonio