From: Stefan Roese <sr@denx.de>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH 2/2] [POWERPC] Add L2 cache node to AMCC Taishan dts file
Date: Wed, 19 Mar 2008 07:30:40 +0100 [thread overview]
Message-ID: <200803190730.41058.sr@denx.de> (raw)
In-Reply-To: <23bc1271d080c41ab54a4917d256a76b@kernel.crashing.org>
On Tuesday 18 March 2008, Segher Boessenkool wrote:
> > + L2C0: l2c@30 {
> > + compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
> > + dcr-reg = <20 8 /* Internal SRAM DCR's */
> > + 30 8>; /* L2 cache DCR's */
>
> The unit address is based on the _first_ entry in "reg".
I'll remove the unit address.
> No2 this
> is "dcr-reg", but you don't really want to be more incompatible than
> necessary...
Sorry, I'm not sure what you're trying to tell me here.
Best regards,
Stefan
next prev parent reply other threads:[~2008-03-19 6:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-18 13:37 [PATCH 2/2] [POWERPC] Add L2 cache node to AMCC Taishan dts file Stefan Roese
2008-03-18 22:40 ` Segher Boessenkool
2008-03-19 6:30 ` Stefan Roese [this message]
2008-03-18 23:24 ` David Gibson
2008-03-19 6:24 ` Stefan Roese
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