From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [4239] x86/x86-64 MMU PAE fixes
Date: Tue, 22 Apr 2008 21:57:12 +0100 [thread overview]
Message-ID: <200804222157.12963.paul@codesourcery.com> (raw)
In-Reply-To: <E1JoPFI-0006oi-2m@cvs.savannah.gnu.org>
On Tuesday 22 April 2008, Aurelien Jarno wrote:
> -#define PHYS_ADDR_MASK 0xfffff000
> +#define PHYS_ADDR_MASK (~0xfff)
I think this is wrong. According to my docs physical addresses have an
architectural limit of 52 bits. Bits 52-62 of a PTE are reserved (must be
zero), and bit 63 is the NX bit.
You already reverted the following, but I'm going to mention it anyway:
> -#elif defined(TARGET_X86_64) && !defined(USE_KQEMU)
> -#define TARGET_PHYS_ADDR_SPACE_BITS 40
I think this should either be 52, or cpu specific.
Paul
next prev parent reply other threads:[~2008-04-22 20:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-04-22 20:37 [Qemu-devel] [4239] x86/x86-64 MMU PAE fixes Aurelien Jarno
2008-04-22 20:57 ` Paul Brook [this message]
2008-04-22 22:19 ` Stuart Brady
2008-04-22 22:29 ` Paul Brook
2008-04-22 22:37 ` Stuart Brady
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