From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JoR7G-0005kJ-VI for qemu-devel@nongnu.org; Tue, 22 Apr 2008 18:37:35 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JoR7G-0005k3-1c for qemu-devel@nongnu.org; Tue, 22 Apr 2008 18:37:34 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JoR7F-0005k0-Vu for qemu-devel@nongnu.org; Tue, 22 Apr 2008 18:37:34 -0400 Received: from mtaout02-winn.ispmail.ntl.com ([81.103.221.48]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JoR7F-0001Lc-Kv for qemu-devel@nongnu.org; Tue, 22 Apr 2008 18:37:33 -0400 Received: from aamtaout04-winn.ispmail.ntl.com ([81.103.221.35]) by mtaout02-winn.ispmail.ntl.com with ESMTP id <20080422224041.YSYR17818.mtaout02-winn.ispmail.ntl.com@aamtaout04-winn.ispmail.ntl.com> for ; Tue, 22 Apr 2008 23:40:41 +0100 Received: from miranda.arrow ([213.107.26.151]) by aamtaout04-winn.ispmail.ntl.com with ESMTP id <20080422223725.DPKX29112.aamtaout04-winn.ispmail.ntl.com@miranda.arrow> for ; Tue, 22 Apr 2008 23:37:25 +0100 Received: from sdb by miranda.arrow with local (Exim 4.63) (envelope-from ) id 1JoR6z-00064P-Ua for qemu-devel@nongnu.org; Tue, 22 Apr 2008 23:37:17 +0100 Date: Tue, 22 Apr 2008 23:37:17 +0100 From: Stuart Brady Subject: Re: [Qemu-devel] [4239] x86/x86-64 MMU PAE fixes Message-ID: <20080422223717.GA23306@miranda.arrow> References: <200804222157.12963.paul@codesourcery.com> <20080422221924.GA23201@miranda.arrow> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20080422221924.GA23201@miranda.arrow> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Tue, Apr 22, 2008 at 11:19:24PM +0100, Stuart Brady wrote: > The documentation I'm using: > > "Intel 64 and IA-32 Architectures Software Development Manual, > Volume 3A: System Programming Guide, Part 1" ... "AMD64 Architecture Programmer's Manual, Volume 2: System Programming" gives a different story. Only bits 52-63 are reserved (MBZ), although for PDEs and PTEs (but not PDPEs, it would seem), bit 63 is the NX bit. However, "The AMD x86-64 Architecture Programmers Overview" says that "bits 63:52 in all page-table entry formats are available for use by system software". -- Stuart Brady