From mboxrd@z Thu Jan  1 00:00:00 1970
From: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Date: Thu, 15 May 2008 12:14:14 +0200
Subject: [U-Boot-Users] U-Boot help request for OHCI driver with CPU
	cache on
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On Thursday 15 May 2008 10:37:04 Markus Klotzb?cher wrote:
> > Could you suggest me how to solve the problem?
> > Is there any specific part of USB driver that requires cache handling?
>
> None that I'm aware of, but I could imagine that enabling caches might
> cause some kind of problems.
With U-Boot's current OHCI implementation you will run into trouble at least 
with cache incoherent CPUs like the 4xx PowerPCs. The 4xx_enet driver
has been modified to deal with this stuff when data caches are enabled.
The USB OHCI driver will also need that kind of fixing (making the code very
ugly). An other approach would be to put the USB DMA accessable memory into
some non-cached memory. Perhaps this is much more simple.

I am not very familiar with MIPS64. But I bet that this is Ryan's problem.

Matthias