From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Brownell Subject: Re: [PATCH 3/4] spi: Add OF binding support for SPI busses Date: Thu, 22 May 2008 19:26:23 -0700 Message-ID: <200805221926.24112.david-b@pacbell.net> References: <20080516193054.28030.35126.stgit@trillian.secretlab.ca> <716a0f1b6c9a544b480c06a329072483@kernel.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: fabrizio.garetto-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, Segher Boessenkool , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linuxppc-dev-mnsaURCQ41sdnm+yROfE0A@public.gmane.org, Guennadi Liakhovetski To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Return-path: In-Reply-To: Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org On Wednesday 21 May 2008, Grant Likely wrote: > > spi-controller { > > =A0 =A0 =A0 =A0#address-cells =3D 2; > > =A0 =A0 =A0 =A0#size-cells =3D 0; > > =A0 =A0 =A0 =A0some-device@0,f000 { reg =3D < 0 f000 >; } // CS 0, SPI = address f000 > > =A0 =A0 =A0 =A0some-device@1,f000 { reg =3D < 1 f000 >; } // CS 1, SPI = address f000 > > =A0 =A0 =A0 =A0some-device@1,ff00 { reg =3D < 1 ff00 >; } // CS 1, SPI = address ff00 > > } > = > For SPI the CS # *is* the address. =A0:-) > = > Unlike I2C, SPI doesn't impose any protocol on the data. =A0It is all > anonymous data out, anonymous data in, a clock and a chip select. Very true ... but then there are SPI chips which embed addressing. I have in mind the mcp23s08 (and mcp23s17) GPIO expanders, which support up to four chips wired in parallel on a given chipselect. The devices are distinguished by how two address pins are wired; and two bits in the command byte must match them. (I think they just recycled an I2C design into the SPI world.) - Dave ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp123.sbc.mail.sp1.yahoo.com (smtp123.sbc.mail.sp1.yahoo.com [69.147.64.96]) by ozlabs.org (Postfix) with SMTP id 40DA5DE04A for ; Fri, 23 May 2008 13:37:23 +1000 (EST) From: David Brownell To: spi-devel-general@lists.sourceforge.net Subject: Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses Date: Thu, 22 May 2008 19:26:23 -0700 References: <20080516193054.28030.35126.stgit@trillian.secretlab.ca> <716a0f1b6c9a544b480c06a329072483@kernel.crashing.org> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Message-Id: <200805221926.24112.david-b@pacbell.net> Cc: fabrizio.garetto@gmail.com, linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, Guennadi Liakhovetski List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wednesday 21 May 2008, Grant Likely wrote: > > spi-controller { > >        #address-cells = 2; > >        #size-cells = 0; > >        some-device@0,f000 { reg = < 0 f000 >; } // CS 0, SPI address f000 > >        some-device@1,f000 { reg = < 1 f000 >; } // CS 1, SPI address f000 > >        some-device@1,ff00 { reg = < 1 ff00 >; } // CS 1, SPI address ff00 > > } > > For SPI the CS # *is* the address.  :-) > > Unlike I2C, SPI doesn't impose any protocol on the data.  It is all > anonymous data out, anonymous data in, a clock and a chip select. Very true ... but then there are SPI chips which embed addressing. I have in mind the mcp23s08 (and mcp23s17) GPIO expanders, which support up to four chips wired in parallel on a given chipselect. The devices are distinguished by how two address pins are wired; and two bits in the command byte must match them. (I think they just recycled an I2C design into the SPI world.) - Dave From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1765465AbYEWDiS (ORCPT ); Thu, 22 May 2008 23:38:18 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1761029AbYEWDhX (ORCPT ); Thu, 22 May 2008 23:37:23 -0400 Received: from smtp123.sbc.mail.sp1.yahoo.com ([69.147.64.96]:23872 "HELO smtp123.sbc.mail.sp1.yahoo.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1760610AbYEWDhW (ORCPT ); Thu, 22 May 2008 23:37:22 -0400 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=pacbell.net; h=Received:X-YMail-OSG:X-Yahoo-Newman-Property:From:To:Subject:Date:User-Agent:Cc:References:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Content-Disposition:Message-Id; b=KPOE9il2yWIS7a+3IEMqfJ8d2F/FiuaiJ2ICZbDLq0TYpPaHWmRPduU6bYvwnN3bze+4VgGcOUMJ8AWZh8SaTzE49URwF0lqC1ho5p+7aqp4/m5mpm+WDS3SVVmtwW66Kpp4JE/5u/1FALaYE0dbJtbTCcRvzzA3muj8soxrc9c= ; X-YMail-OSG: iYwHLo0VM1mGgi7stQ7MWhUnXpS_lsl2vHNVa2K0xtfEMrROW5xrcJKafPlv8sUYSXTEszcZNn3mL_J78TAfdOJQh5tAeJWOnbF.ic6Y2GyCKuzbV9qWDGp_sDOLbjf4M9Y- X-Yahoo-Newman-Property: ymail-3 From: David Brownell To: spi-devel-general@lists.sourceforge.net Subject: Re: [spi-devel-general] [PATCH 3/4] spi: Add OF binding support for SPI busses Date: Thu, 22 May 2008 19:26:23 -0700 User-Agent: KMail/1.9.9 Cc: "Grant Likely" , "Segher Boessenkool" , linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, fabrizio.garetto@gmail.com, Guennadi Liakhovetski References: <20080516193054.28030.35126.stgit@trillian.secretlab.ca> <716a0f1b6c9a544b480c06a329072483@kernel.crashing.org> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8bit Content-Disposition: inline Message-Id: <200805221926.24112.david-b@pacbell.net> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 21 May 2008, Grant Likely wrote: > > spi-controller { > >        #address-cells = 2; > >        #size-cells = 0; > >        some-device@0,f000 { reg = < 0 f000 >; } // CS 0, SPI address f000 > >        some-device@1,f000 { reg = < 1 f000 >; } // CS 1, SPI address f000 > >        some-device@1,ff00 { reg = < 1 ff00 >; } // CS 1, SPI address ff00 > > } > > For SPI the CS # *is* the address.  :-) > > Unlike I2C, SPI doesn't impose any protocol on the data.  It is all > anonymous data out, anonymous data in, a clock and a chip select. Very true ... but then there are SPI chips which embed addressing. I have in mind the mcp23s08 (and mcp23s17) GPIO expanders, which support up to four chips wired in parallel on a given chipselect. The devices are distinguished by how two address pins are wired; and two bits in the command byte must match them. (I think they just recycled an I2C design into the SPI world.) - Dave