diff for duplicates of <20080604124714.55dbce65@core> diff --git a/a/1.txt b/N1/1.txt index b9d0320..bfe0bde 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,15 +1,17 @@ -> Anyway, Intel certainly seems to document that WC memory is serialized by +> Anyway, Intel certainly seems to document that WC memory is serialized by= +=20 > any access to UC memory. I don't believe that is actually true on Pentium Pro at least. -> So what started out as a "we can do accesses to the frame buffer more -> efficiently without anybody ever even having to know or care" has -> turned into a whole nightmare of people using it for other things, and +> So what started out as a "we can do accesses to the frame buffer more=20 +> efficiently without anybody ever even having to know or care" has=20 +> turned into a whole nightmare of people using it for other things, and= +=20 > then you very much _do_ have to care! ] Notably graphics where 3Dfx lined the registers up specifically to make -this work. We were also using it with I²O where it gave a small +this work. We were also using it with I=C2=B2O where it gave a small performance gain. Alan diff --git a/a/content_digest b/N1/content_digest index 0211c9f..c5b3a9f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -7,31 +7,33 @@ "Subject\0Re: MMIO and gcc re-ordering issue\0" "Date\0Wed, 4 Jun 2008 12:47:14 +0100\0" "To\0Linus Torvalds <torvalds@linux-foundation.org>\0" - "Cc\0Nick Piggin <nickpiggin@yahoo.com.au>" - Trent Piepho <tpiepho@freescale.com> + "Cc\0Benjamin" + Nick Piggin <nickpiggin@yahoo.com.au> Russell King <rmk+lkml@arm.linux.org.uk> - Benjamin Herrenschmidt <benh@kernel.crashing.org> - David Miller <davem@davemloft.net> + linux-kernel@vger.kernel.org + Trent Piepho <tpiepho@freescale.com> + linuxppc-dev@ozlabs.org linux-arch@vger.kernel.org scottwood@freescale.com - linuxppc-dev@ozlabs.org - " linux-kernel@vger.kernel.org\0" + " David Miller <davem@davemloft.net>\0" "\00:1\0" "b\0" - "> Anyway, Intel certainly seems to document that WC memory is serialized by \n" + "> Anyway, Intel certainly seems to document that WC memory is serialized by=\n" + "=20\n" "> any access to UC memory.\n" "\n" "I don't believe that is actually true on Pentium Pro at least.\n" "\n" - "> So what started out as a \"we can do accesses to the frame buffer more \n" - "> efficiently without anybody ever even having to know or care\" has \n" - "> turned into a whole nightmare of people using it for other things, and \n" + "> So what started out as a \"we can do accesses to the frame buffer more=20\n" + "> efficiently without anybody ever even having to know or care\" has=20\n" + "> turned into a whole nightmare of people using it for other things, and=\n" + "=20\n" "> then you very much _do_ have to care! ]\n" "\n" "Notably graphics where 3Dfx lined the registers up specifically to make\n" - "this work. We were also using it with I\302\262O where it gave a small\n" + "this work. We were also using it with I=C2=B2O where it gave a small\n" "performance gain.\n" "\n" Alan -a9f976bde50d1804aa2fb2fc912868bd051ff80487a992d263949eefede71935 +a7d279fc3e5b72c8289bc1aa9e55934868ea66e3a1327c422242f39d335d9cd6
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