From: "Yang, Sheng" <sheng.yang@intel.com>
To: kvm@vger.kernel.org
Subject: [PATCH 2/4] KVM: VMX: Get the consistent describe of cpu feature report
Date: Thu, 19 Jun 2008 18:43:21 +0800 [thread overview]
Message-ID: <200806191843.22037.sheng.yang@intel.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 2504 bytes --]
From 983b4c5b081bcbe01c4c50d3b2916eeb1e51eb49 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Thu, 19 Jun 2008 18:41:42 +0800
Subject: [PATCH] KVM: VMX: Get the consistent describe of cpu feature report
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
arch/x86/kvm/vmx.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6e4278d..0fbbf6d 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -213,7 +213,7 @@ static inline int vm_need_tpr_shadow(struct kvm *kvm)
return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
}
-static inline int cpu_has_secondary_exec_ctrls(void)
+static inline int cpu_has_vmx_secondary_exec_ctrls(void)
{
return (vmcs_config.cpu_based_exec_ctrl &
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
@@ -264,7 +264,7 @@ static inline int cpu_has_vmx_vpid(void)
SECONDARY_EXEC_ENABLE_VPID);
}
-static inline int cpu_has_virtual_nmis(void)
+static inline int cpu_has_vmx_virtual_nmis(void)
{
return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
}
@@ -1902,7 +1902,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
CPU_BASED_CR3_LOAD_EXITING;
vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
- if (cpu_has_secondary_exec_ctrls()) {
+ if (cpu_has_vmx_secondary_exec_ctrls()) {
exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
exec_control &=
@@ -2777,7 +2777,7 @@ static void enable_nmi_window(struct kvm_vcpu *vcpu)
{
u32 cpu_based_vm_exec_control;
- if (!cpu_has_virtual_nmis())
+ if (!cpu_has_vmx_virtual_nmis())
return;
cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
@@ -2848,7 +2848,7 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
* faulted.
*/
if ((idtv_info_field & VECTORING_INFO_TYPE_MASK)
- == INTR_TYPE_NMI_INTR && cpu_has_virtual_nmis())
+ == INTR_TYPE_NMI_INTR && cpu_has_vmx_virtual_nmis())
vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
~GUEST_INTR_STATE_NMI);
@@ -2864,7 +2864,7 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
enable_intr_window(vcpu);
return;
}
- if (cpu_has_virtual_nmis()) {
+ if (cpu_has_vmx_virtual_nmis()) {
/*
* SDM 3: 25.7.1.2
* Re-set bit "block by NMI" before VM entry if vmexit caused by
--
1.5.5
[-- Attachment #2: 0002-KVM-VMX-Get-the-consistent-describe-of-cpu-feature.patch --]
[-- Type: text/x-diff, Size: 2510 bytes --]
From 983b4c5b081bcbe01c4c50d3b2916eeb1e51eb49 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Thu, 19 Jun 2008 18:41:42 +0800
Subject: [PATCH] KVM: VMX: Get the consistent describe of cpu feature report
Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
arch/x86/kvm/vmx.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6e4278d..0fbbf6d 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -213,7 +213,7 @@ static inline int vm_need_tpr_shadow(struct kvm *kvm)
return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
}
-static inline int cpu_has_secondary_exec_ctrls(void)
+static inline int cpu_has_vmx_secondary_exec_ctrls(void)
{
return (vmcs_config.cpu_based_exec_ctrl &
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
@@ -264,7 +264,7 @@ static inline int cpu_has_vmx_vpid(void)
SECONDARY_EXEC_ENABLE_VPID);
}
-static inline int cpu_has_virtual_nmis(void)
+static inline int cpu_has_vmx_virtual_nmis(void)
{
return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
}
@@ -1902,7 +1902,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
CPU_BASED_CR3_LOAD_EXITING;
vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
- if (cpu_has_secondary_exec_ctrls()) {
+ if (cpu_has_vmx_secondary_exec_ctrls()) {
exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
exec_control &=
@@ -2777,7 +2777,7 @@ static void enable_nmi_window(struct kvm_vcpu *vcpu)
{
u32 cpu_based_vm_exec_control;
- if (!cpu_has_virtual_nmis())
+ if (!cpu_has_vmx_virtual_nmis())
return;
cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
@@ -2848,7 +2848,7 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
* faulted.
*/
if ((idtv_info_field & VECTORING_INFO_TYPE_MASK)
- == INTR_TYPE_NMI_INTR && cpu_has_virtual_nmis())
+ == INTR_TYPE_NMI_INTR && cpu_has_vmx_virtual_nmis())
vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
~GUEST_INTR_STATE_NMI);
@@ -2864,7 +2864,7 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
enable_intr_window(vcpu);
return;
}
- if (cpu_has_virtual_nmis()) {
+ if (cpu_has_vmx_virtual_nmis()) {
/*
* SDM 3: 25.7.1.2
* Re-set bit "block by NMI" before VM entry if vmexit caused by
--
1.5.5
reply other threads:[~2008-06-19 10:43 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=200806191843.22037.sheng.yang@intel.com \
--to=sheng.yang@intel.com \
--cc=kvm@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.