From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Subject: Re: [Qemu-devel] [RFC][PATCH] x86: CS limit checks
Date: Thu, 17 Jul 2008 18:45:44 +0100 [thread overview]
Message-ID: <200807171845.45005.paul@codesourcery.com> (raw)
In-Reply-To: <487F6F0F.4010507@siemens.com>
> To me it looks like as if the generator can so far raise a PF
> prematurely when it steps on an invalid code address while building a
> new TB. This probably has to fix the same way as the limit check is
> realized: by injecting an exception (PF or GP) into the generated code
> at the correct PC. Hmm, the PF-during-translation issue is probably not
> just limited to x86...
Alpha, PPC, SPARC, SH and ARM avoid the problem by having fixed length word
aligned instructions. Thumb-1 has special handling for the cross-boundary
case (Instructions aren't really variable length, we just treat them that way
as an optimisation).
Thumb-2, m68k, cris and x86 all look like they may incorrectly fetch code from
the next page.
Paul
next prev parent reply other threads:[~2008-07-17 17:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-07-17 11:57 [Qemu-devel] [RFC][PATCH] x86: CS limit checks Jan Kiszka
2008-07-17 12:17 ` Paul Brook
2008-07-17 13:14 ` Jan Kiszka
2008-07-17 13:37 ` Paul Brook
2008-07-17 16:10 ` Jan Kiszka
2008-07-17 17:45 ` Paul Brook [this message]
2008-07-17 19:24 ` Fabrice Bellard
2008-07-17 21:30 ` [Qemu-devel] " Jan Kiszka
2008-07-17 14:06 ` [Qemu-devel] " Fabrice Bellard
2008-07-17 16:30 ` [Qemu-devel] " Jan Kiszka
2008-07-17 19:29 ` Fabrice Bellard
2008-07-17 21:25 ` Jan Kiszka
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