From mboxrd@z Thu Jan 1 00:00:00 1970 From: Cyrill Gorcunov Subject: Re: linux-next: manual merge of the oprofile tree Date: Mon, 25 Aug 2008 18:34:49 +0400 Message-ID: <20080825143449.GA7249@lenovo> References: <20080825190822.591685e5.sfr@canb.auug.org.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from fg-out-1718.google.com ([72.14.220.157]:49323 "EHLO fg-out-1718.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752027AbYHYOey (ORCPT ); Mon, 25 Aug 2008 10:34:54 -0400 Received: by fg-out-1718.google.com with SMTP id 19so990272fgg.17 for ; Mon, 25 Aug 2008 07:34:52 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20080825190822.591685e5.sfr@canb.auug.org.au> Sender: linux-next-owner@vger.kernel.org List-ID: To: Stephen Rothwell Cc: Ingo Molnar , linux-next@vger.kernel.org, Robert Richter , Thomas Gleixner , "H. Peter Anvin" [Stephen Rothwell - Mon, Aug 25, 2008 at 07:08:22PM +1000] | Hi Ingo, | | Today's linux-next merge of the oprofile tree got a conflict in | arch/x86/kernel/apic_32.c between commit | 274cfe5912eebe9d4e1a4c451fe617289a181fcf ("x86: apic - rearrange | functions and comments") from the x86 tree and commits | 286f571837ba9d67625afd015366d79345abb414 ("x86: apic_*.c: add description | to AMD's extended LVT functions"), | 09691616850b3614dfb44790e1e1419b6a7f5d13 ("x86: apic: export symbols for | extended interrupt LVT functions") and | 6aa360e6c16c145edf1837690e0f7aaea6b86ef3 ("x86: apic: changing export | symbols to *_GPL") from the oprofile tree. | | The former moved some code that was updated by the latter. I fixed it up | (see below) and can carry it. | | -- | Cheers, | Stephen Rothwell sfr@canb.auug.org.au | http://www.canb.auug.org.au/~sfr/ | | diff --cc arch/x86/kernel/apic_32.c | index a91c57c,0ff576d..0000000 | --- a/arch/x86/kernel/apic_32.c | +++ b/arch/x86/kernel/apic_32.c | @@@ -291,36 -241,6 +291,40 @@@ static void __setup_APIC_LVTT(unsigned | } | | /* | + * Setup extended LVT, AMD specific (K8, family 10h) | + * | + * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and | + * MCE interrupts are supported. Thus MCE offset must be set to 0. | ++ * | ++ * If mask=1, the LVT entry does not generate interrupts while mask=0 | ++ * enables the vector. See also the BKDGs. | + */ | + | +#define APIC_EILVT_LVTOFF_MCE 0 | +#define APIC_EILVT_LVTOFF_IBS 1 | + | +static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask) | +{ | + unsigned long reg = (lvt_off << 4) + APIC_EILVT0; | + unsigned int v = (mask << 16) | (msg_type << 8) | vector; | + | + apic_write(reg, v); | +} | + | +u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask) | +{ | + setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type, mask); | + return APIC_EILVT_LVTOFF_MCE; | +} | + | +u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask) | +{ | + setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type, mask); | + return APIC_EILVT_LVTOFF_IBS; | +} | ++EXPORT_SYMBOL_GPL(setup_APIC_eilvt_ibs); | + | +/* | * Program the next event, relative to now | */ | static int lapic_next_event(unsigned long delta, | Thanks Stephen - Cyrill -