From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KYqqX-0003cO-AP for qemu-devel@nongnu.org; Thu, 28 Aug 2008 19:24:09 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KYqqW-0003b9-67 for qemu-devel@nongnu.org; Thu, 28 Aug 2008 19:24:09 -0400 Received: from [199.232.76.173] (port=57357 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KYqqV-0003ax-V7 for qemu-devel@nongnu.org; Thu, 28 Aug 2008 19:24:07 -0400 Received: from hall.aurel32.net ([91.121.138.14]:46625) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KYqqV-0004sK-FI for qemu-devel@nongnu.org; Thu, 28 Aug 2008 19:24:07 -0400 Received: from volta-wlan.aurel32.net ([2002:52e8:2fb:ffff:21d:e0ff:fe49:1047] helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1KYqqO-0007Jr-4m for qemu-devel@nongnu.org; Fri, 29 Aug 2008 01:24:00 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.69) (envelope-from ) id 1KYqqH-0006T5-D2 for qemu-devel@nongnu.org; Fri, 29 Aug 2008 01:23:53 +0200 Date: Fri, 29 Aug 2008 01:23:53 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [5100] SH4: Convert register moves to TCG Message-ID: <20080828232353.GA10605@volta.aurel32.net> References: <200808282313.42947.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <200808282313.42947.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Thu, Aug 28, 2008 at 11:13:42PM +0100, Paul Brook wrote: > On Thursday 28 August 2008, Aurelien Jarno wrote: > > +static always_inline void gen_movl_T_rN (TCGv t, int reg) > > +{ > > +    tcg_gen_st_tl(t, cpu_env, offsetof(CPUState, gregs[reg])); > > The preferred way of doing this is to have TCG variables for common (possibly > all?) registers. See e.g. m68k or sparc. > Until now I have used MIPS as an example, it copies CPU registers to TCG variables. As you pointed, m68k and sparc use direct access to CPU registers through TCG variables. I wonder in which way what your propose is better? It seems easier to write, but what about the runtime speed? -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net