From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Kb7MA-0003Qp-AM for qemu-devel@nongnu.org; Thu, 04 Sep 2008 01:26:10 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Kb7M9-0003Po-KB for qemu-devel@nongnu.org; Thu, 04 Sep 2008 01:26:09 -0400 Received: from [199.232.76.173] (port=51324 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Kb7M9-0003PQ-6A for qemu-devel@nongnu.org; Thu, 04 Sep 2008 01:26:09 -0400 Received: from hall.aurel32.net ([91.121.138.14]:59805) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kb7M6-0003CD-3E for qemu-devel@nongnu.org; Thu, 04 Sep 2008 01:26:09 -0400 Received: from 151.red-80-38-163.staticip.rima-tde.net ([80.38.163.151] helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1Kb7M0-0004ci-EZ for qemu-devel@nongnu.org; Thu, 04 Sep 2008 07:26:00 +0200 Received: from aurel32 by volta.aurel32.net with local (Exim 4.69) (envelope-from ) id 1Kb7Lu-0004a9-0f for qemu-devel@nongnu.org; Thu, 04 Sep 2008 07:25:54 +0200 Date: Thu, 4 Sep 2008 07:25:48 +0200 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 5/x v2] ppc: Convert GPR moves to TCG Message-ID: <20080904052548.GA30409@volta.aurel32.net> References: <20080902232051.GS4681@volta.aurel32.net> <20080903050757.GX4681@volta.aurel32.net> <20080903112840.GC17474@networkno.de> <7F235F5C-A1C9-4617-8C8D-900778862BBD@web.de> <67BC3D0E-6819-426A-BD93-ADE75621E6E4@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Wed, Sep 03, 2008 at 10:04:39PM +0200, Andreas Färber wrote: > Replace op_load_gpr_{T0,T1,T2} and op_store_{T0,T1,T2} with > tcg_gen_mov_tl. > Introduce TCG variables cpu_gpr[0..31]. > > For the SPE extension, assure that ppc_gpr_t is only uint64_t for ppc64. > Introduce TCG variables cpu_gprh[0..31] for upper 32 bits on ppc and > helpers > gen_{load,store}_gpr64. Based on suggestions by Aurelien, Thiemo and > Blue. > > Signed-off-by: Andreas Faerber > --- > target-ppc/cpu.h | 12 +- > target-ppc/op_template.h | 85 ------ > target-ppc/translate.c | 747 +++++++++++++++++++++++ > +---------------------- > 3 files changed, 390 insertions(+), 454 deletions(-) > I do not feel comfortable of defining t0, t1, t2 as both 32-bit and 64-bit variables in TCG. I have already seen aliasing problems at some point. I have therefore applied your patch, as well as another one which defines separate t0_64, t1_64, t2_64 registers on 32-bit targets. At the end of the conversion to TCG, those variables will disappear anyway. Thanks for your work. -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net