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diff for duplicates of <20081001165725.GA21559@linux-os.sc.intel.com>

diff --git a/a/1.txt b/N1/1.txt
index 63bf209..1d561b6 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -113,8 +113,8 @@ index fc5f2db..18e1ea2 100644
 +#define ROOT_SIZE		IOMMU_PAGE_SIZE
 +#define CONTEXT_SIZE		IOMMU_PAGE_SIZE
 +
- #define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) = PCI_BASE_CLASS_DISPLAY)
- #define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) = PCI_CLASS_BRIDGE_ISA)
+ #define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
+ #define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
  
 @@ -132,6 +135,17 @@ static inline void *iommu_kmem_cache_alloc(struct kmem_cache *cachep)
  	return vaddr;
@@ -206,7 +206,7 @@ index fc5f2db..18e1ea2 100644
  
 -	BUG_ON(addr & (~PAGE_MASK_4K));
 +	BUG_ON(addr & (~IOMMU_PAGE_MASK));
- 	BUG_ON(pages = 0);
+ 	BUG_ON(pages == 0);
  
  	/* Fallback to domain selective flush if no PSI support */
 @@ -831,7 +850,7 @@ void dmar_msi_read(int irq, struct msi_msg *msg)
@@ -256,7 +256,7 @@ index fc5f2db..18e1ea2 100644
 +
 +	hpa &= (((u64)1) << addr_width) - 1;
  
- 	if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) = 0)
+ 	if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0)
  		return -EINVAL;
 -	iova &= PAGE_MASK_4K;
 -	start_pfn = ((u64)hpa) >> PAGE_SHIFT_4K;
@@ -340,8 +340,8 @@ index fc5f2db..18e1ea2 100644
  	struct dmar_domain *domain;
 @@ -1825,7 +1849,7 @@ intel_map_single(struct device *hwdev, phys_addr_t paddr, size_t size, int dir)
  
- 	BUG_ON(dir = DMA_NONE);
- 	if (pdev->dev.archdata.iommu = DUMMY_DEVICE_DOMAIN_INFO)
+ 	BUG_ON(dir == DMA_NONE);
+ 	if (pdev->dev.archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO)
 -		return paddr;
 +		return (dma_addr_t)paddr;
  
@@ -493,7 +493,7 @@ index fc5f2db..18e1ea2 100644
  {
  	void *addr;
 @@ -2112,14 +2137,14 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist,
- 	if (dir = DMA_FROM_DEVICE || dir = DMA_BIDIRECTIONAL)
+ 	if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  		prot |= DMA_PTE_WRITE;
  
 -	start_addr = iova->pfn_lo << PAGE_SHIFT_4K;
diff --git a/a/content_digest b/N1/content_digest
index 99f11e6..bd251ee 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,7 +2,7 @@
  "ref\0617E1C2C70743745A92448908E030B2A02AD5AD7@scsmsx411.amr.corp.intel.com\0"
  "From\0Fenghua Yu <fenghua.yu@intel.com>\0"
  "Subject\0[PATCH 1/2]Add Variable Page Size and IA64 Support in Intel IOMMU: Generic Part\0"
- "Date\0Wed, 01 Oct 2008 16:57:25 +0000\0"
+ "Date\0Wed, 1 Oct 2008 09:57:25 -0700\0"
  "To\0Luck"
   Tony <tony.luck@intel.com>
   Jesse Barnes <jbarnes@virtuousgeek.org>
@@ -130,8 +130,8 @@
  "+#define ROOT_SIZE\t\tIOMMU_PAGE_SIZE\n"
  "+#define CONTEXT_SIZE\t\tIOMMU_PAGE_SIZE\n"
  "+\n"
- " #define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) = PCI_BASE_CLASS_DISPLAY)\n"
- " #define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) = PCI_CLASS_BRIDGE_ISA)\n"
+ " #define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)\n"
+ " #define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)\n"
  " \n"
  "@@ -132,6 +135,17 @@ static inline void *iommu_kmem_cache_alloc(struct kmem_cache *cachep)\n"
  " \treturn vaddr;\n"
@@ -223,7 +223,7 @@
  " \n"
  "-\tBUG_ON(addr & (~PAGE_MASK_4K));\n"
  "+\tBUG_ON(addr & (~IOMMU_PAGE_MASK));\n"
- " \tBUG_ON(pages = 0);\n"
+ " \tBUG_ON(pages == 0);\n"
  " \n"
  " \t/* Fallback to domain selective flush if no PSI support */\n"
  "@@ -831,7 +850,7 @@ void dmar_msi_read(int irq, struct msi_msg *msg)\n"
@@ -273,7 +273,7 @@
  "+\n"
  "+\thpa &= (((u64)1) << addr_width) - 1;\n"
  " \n"
- " \tif ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) = 0)\n"
+ " \tif ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0)\n"
  " \t\treturn -EINVAL;\n"
  "-\tiova &= PAGE_MASK_4K;\n"
  "-\tstart_pfn = ((u64)hpa) >> PAGE_SHIFT_4K;\n"
@@ -357,8 +357,8 @@
  " \tstruct dmar_domain *domain;\n"
  "@@ -1825,7 +1849,7 @@ intel_map_single(struct device *hwdev, phys_addr_t paddr, size_t size, int dir)\n"
  " \n"
- " \tBUG_ON(dir = DMA_NONE);\n"
- " \tif (pdev->dev.archdata.iommu = DUMMY_DEVICE_DOMAIN_INFO)\n"
+ " \tBUG_ON(dir == DMA_NONE);\n"
+ " \tif (pdev->dev.archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO)\n"
  "-\t\treturn paddr;\n"
  "+\t\treturn (dma_addr_t)paddr;\n"
  " \n"
@@ -510,7 +510,7 @@
  " {\n"
  " \tvoid *addr;\n"
  "@@ -2112,14 +2137,14 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist,\n"
- " \tif (dir = DMA_FROM_DEVICE || dir = DMA_BIDIRECTIONAL)\n"
+ " \tif (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)\n"
  " \t\tprot |= DMA_PTE_WRITE;\n"
  " \n"
  "-\tstart_addr = iova->pfn_lo << PAGE_SHIFT_4K;\n"
@@ -742,4 +742,4 @@
  "+\n"
   #endif
 
-f41484070d02bd3bda51c7c0e64e3c8d0fe3eeb5a99eefbf4c16fc13ae3ec9b4
+efc581aa16f989ad49d1d1394efbc6ce9f68ff702bff9e9c69ed967087dd549a

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