From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KpOXI-0002JV-4v for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:36:40 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KpOXH-0002Iu-JL for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:36:39 -0400 Received: from [199.232.76.173] (port=35705 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KpOXH-0002In-Di for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:36:39 -0400 Received: from mail.codesourcery.com ([65.74.133.4]:58636) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KpOXG-00027h-JR for qemu-devel@nongnu.org; Mon, 13 Oct 2008 10:36:38 -0400 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH] ARM CP14 trivial support Date: Mon, 13 Oct 2008 15:36:35 +0100 References: <1223894552.30000.30.camel@petitemort> <200810131420.43031.paul@codesourcery.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200810131536.35768.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: dsilvers@simtec.co.uk > Coprocessor io has similar potential to mmio or x86 port io. You said > it's device specific. If in a SoC a peripheral is attached through > it, probably the whole peripheral shouldn't be in target-arm/ ? I disbelieve that any chips use the came coprocessor ID for both core and SoC functionality. Paul