From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: Nathan Froyd <froydnj@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH][ppc] reorganize register set for SPE + TCG
Date: Wed, 15 Oct 2008 16:25:35 +0100 [thread overview]
Message-ID: <200810151625.38238.paul@codesourcery.com> (raw)
In-Reply-To: <20081015142237.GN18389@codesourcery.com>
On Wednesday 15 October 2008, Nathan Froyd wrote:
> The (large, invasive) patch below is a preparation patch for converting
> (most) SPE instructions to use TCG. The rationale is that your ordinary
> SPE instruction deals with three 64-bit quantaties (and a potential
> 64-bit accumulator). In the current implementation, it's extremely
> laborious/difficult to pass those 64-bit quantaties to helpers, since
> the high/low words for SPE registers are not contiguous in the
> environment. (TCG helpers for SPE instructions are not yet implemented,
> but they will be necessary as part of the total conversion to TCG.)
Constructing and passing 64-bit arguments from a pair of 32-bit values should
be fairly simple with TCG. There's no reason to pass low and high halves of a
value separately.
> I don't know if the introduction of so many tcg_global_mem_new's will be
> detrimental to TCG's performance, but I will leave comment on that to
> somebody more expert than I.
I'm not sure if tcg variables are allowed to overlap. I suspect requiring they
be unique simplifies code generation, but don't know if the current TCG code
takes care of this.
Paul
next prev parent reply other threads:[~2008-10-15 15:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-15 14:22 [Qemu-devel] [PATCH][ppc] reorganize register set for SPE + TCG Nathan Froyd
2008-10-15 15:20 ` Nathan Froyd
2008-10-15 15:25 ` Paul Brook [this message]
2008-10-15 16:11 ` Aurelien Jarno
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