From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Kqop2-0005Oy-Gq for qemu-devel@nongnu.org; Fri, 17 Oct 2008 08:52:52 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Kqop1-0005Oh-35 for qemu-devel@nongnu.org; Fri, 17 Oct 2008 08:52:52 -0400 Received: from [199.232.76.173] (port=47204 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Kqop1-0005Oe-0W for qemu-devel@nongnu.org; Fri, 17 Oct 2008 08:52:51 -0400 Received: from mail.codesourcery.com ([65.74.133.4]:56148) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kqop0-0001N6-OF for qemu-devel@nongnu.org; Fri, 17 Oct 2008 08:52:51 -0400 From: Vladimir Prus Date: Fri, 17 Oct 2008 16:52:46 +0400 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200810171652.46611.vladimir@codesourcery.com> Subject: [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This patch makes qemu recognize (and ignore), three instructions from SH4A. First if prefetch (prefi). QEMU does not model cache, and the instruction is documented to never cause TLB miss. Second is icbi, which invalidates cache block, and again, no cache is simulated. Last is synco, which is memory barrier, but qemu does not reorder memory operations anyway, I think. - Volodya * target-sh4/translate.c (_decode_opc): Handle prefi, icbi, and synco. --- target-sh4/translate.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 0eeb294..bf86329 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1552,6 +1552,12 @@ void _decode_opc(DisasContext * ctx) return; case 0x0083: /* pref @Rn */ return; + case 0x00d3: /* prefi @Rn */ + return; + case 0x00e3: /* icbi @Rn */ + return; + case 0x00ab: /* synco */ + return; case 0x4024: /* rotcl Rn */ { TCGv tmp = tcg_temp_new(TCG_TYPE_I32); -- 1.5.3.5