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Date: Thu, 6 Nov 2008 11:41:09 +0100
From: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH] Fix Alpha ret instruction
Message-ID: <20081106104109.GA30068@volta.aurel32.net>
References: <20081105170355.E80362@stanley.csl.cornell.edu>
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To: qemu-devel@nongnu.org

On Wed, Nov 05, 2008 at 05:07:41PM -0500, Vince Weaver wrote:
>
> Hopefully pine doesn't corrupt this patch, I've had problems recently.
>
> For an alpha "ret" instruction, of the type
>     ret $26
>
> The return was being ignored.  This is because in translate.c
> register $26 (the return address) was being over-written with the current 
> PC before it could be jumped to.  Thus the ret was ignored.
>
> This patch just re-orders things so the return address is processed 
> before it is over-written with the current PC.
>

Thanks, applied.

> Index: target-alpha/translate.c
> ===================================================================
> --- target-alpha/translate.c	(revision 5636)
> +++ target-alpha/translate.c	(working copy)
> @@ -1634,12 +1634,13 @@
>          break;
>  #endif
>      case 0x1A:
> -        if (ra != 31)
> -            tcg_gen_movi_i64(cpu_ir[ra], ctx->pc);
>          if (rb != 31)
>              tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3);
>          else
>              tcg_gen_movi_i64(cpu_pc, 0);
> +        if (ra != 31)
> +            tcg_gen_movi_i64(cpu_ir[ra], ctx->pc);
> +
>          /* Those four jumps only differ by the branch prediction hint */
>          switch (fn2) {
>          case 0x0:
>
>
>

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
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