From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KyT6V-0002Kz-Pq for qemu-devel@nongnu.org; Fri, 07 Nov 2008 10:18:31 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KyT6U-0002Km-Jk for qemu-devel@nongnu.org; Fri, 07 Nov 2008 10:18:31 -0500 Received: from [199.232.76.173] (port=37070 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KyT6U-0002Kh-FS for qemu-devel@nongnu.org; Fri, 07 Nov 2008 10:18:30 -0500 Received: from hall.aurel32.net ([88.191.82.174]:46931) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KyT6U-0002e1-21 for qemu-devel@nongnu.org; Fri, 07 Nov 2008 10:18:30 -0500 Received: from aurel32 by hall.aurel32.net with local (Exim 4.63) (envelope-from ) id 1KyT6S-0002zI-LL for qemu-devel@nongnu.org; Fri, 07 Nov 2008 16:18:28 +0100 Date: Fri, 7 Nov 2008 16:18:28 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Alpha: fix locked loads/stores Message-ID: <20081107151828.GA353@hall.aurel32.net> References: <761ea48b0811070334lb817c00x38624ca7bb41bb57@mail.gmail.com> <20081107140034.GA28030@volta.aurel32.net> <761ea48b0811070619y3a6447e9g7b07dee73703ef6c@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <761ea48b0811070619y3a6447e9g7b07dee73703ef6c@mail.gmail.com> Sender: Aurelien Jarno Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Fri, Nov 07, 2008 at 03:19:08PM +0100, Laurent Desnogues wrote: > On Fri, Nov 7, 2008 at 3:00 PM, Aurelien Jarno wrote: > > On Fri, Nov 07, 2008 at 12:34:29PM +0100, Laurent Desnogues wrote: > >> Hello, > >> > >> this patch is based on Vince Weaver patch for locked loads/stores. > >> It was checked against Alpha architecture manual. > >> > >> Two fixes were done to Vince's patch: > >> > >> - use a comparison to 1 for lock instead of 0 to be closer to the > >> Alpha spec > > > > I don't agree with this part. The current code use a single variable for > > both address and lock_bit to spare a few tests. Basically it sets > > cpu_lock to -1 when not locked and stores the address when locked. Your > > patch does not compare the address, so it will break multi-threading. > > My understanding of the Alpha architecture manual is that > if the addresses don't meet certain criteria (which you > simplify to addresses comparison) then failure or success > of st_c is UNPREDICTABLE (I am not shouting, it's the way > they write it :-) unless some lock clearing occurred (cf > section 4.2.5). The manual is actually not really clear. Section 4.2.5 does not really speak about storing the locked address, while Section 3.1.4 explicitly mentions a "locked_physical_address register". The current implementation, now that it is fixed (can someone confirms that the problem is actually fixed?), matches the pre-TCG implementation. I am not sure it is the correct one, but if it works for now and until someone comes with more arguments, I think we should let the code as now. Aurelien -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net