From: Magnus Damm <magnus.damm@gmail.com>
To: linux-sh@vger.kernel.org
Subject: [PATCH 5/8] sh: timer rewrite, sh7722 support
Date: Fri, 21 Nov 2008 13:19:55 +0000 [thread overview]
Message-ID: <20081121131955.4175.53365.sendpatchset@rx1.opensource.se> (raw)
From: Magnus Damm <damm@igel.co.jp>
Add CMT and TMU devices and use the new timer code on sh7722.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
---
arch/sh/Kconfig | 1
arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 46 ++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+)
--- 0005/arch/sh/Kconfig
+++ work/arch/sh/Kconfig 2008-11-21 16:06:12.000000000 +0900
@@ -356,6 +356,7 @@ config CPU_SUBTYPE_SH7722
select CPU_SHX2
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
+ select SH_TIMER
config CPU_SUBTYPE_SH7366
bool "Support SH7366 processor"
--- 0001/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ work/arch/sh/kernel/cpu/sh4a/setup-sh7722.c 2008-11-21 16:05:43.000000000 +0900
@@ -13,6 +13,7 @@
#include <linux/serial_sci.h>
#include <linux/mm.h>
#include <linux/uio_driver.h>
+#include <linux/sh_timer.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
@@ -343,6 +344,51 @@ void __init plat_irq_setup(void)
register_intc_controller(&intc_desc);
}
+static struct sh_timer_config timers[] = {
+ {
+ .type = SH_TIMER_TYPE_CMT,
+ .name = "CMT",
+ .base = 0x044a0000,
+ .channel_offset = 0x60,
+ .timer_bit = 5,
+ .clk = "cmt0",
+ .irq = 104,
+ },
+ {
+ .type = SH_TIMER_TYPE_TMU,
+ .name = "TMU0",
+ .base = 0xffd80004,
+ .channel_offset = 0x04,
+ .timer_bit = 0,
+ .clk = "tmu0",
+ .irq = 16,
+ },
+ {
+ .type = SH_TIMER_TYPE_TMU,
+ .name = "TMU1",
+ .base = 0xffd80004,
+ .channel_offset = 0x10,
+ .timer_bit = 1,
+ .clk = "tmu0",
+ .irq = 17,
+ },
+ {
+ .type = SH_TIMER_TYPE_TMU,
+ .name = "TMU2",
+ .base = 0xffd80004,
+ .channel_offset = 0x1c,
+ .timer_bit = 2,
+ .clk = "tmu0",
+ .irq = 18,
+ }
+};
+
+static int __init plat_timer_setup(void)
+{
+ return sh_timer_register(timers, ARRAY_SIZE(timers));
+}
+arch_initcall(plat_timer_setup);
+
void __init plat_mem_setup(void)
{
/* Register the URAM space as Node 1 */
reply other threads:[~2008-11-21 13:19 UTC|newest]
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