[Qemu-devel] [PATCH] target-ppc: initialize MSR appropriately in user-mode

[Nathan Froyd <froydnj@codesourcery.com>]

We shouldn't blindly initialize the floating-point bit in MSR; we should
only do so if the processor we're targetting supports floating-point.
We should also do the same thing with the Altivec and e500 bits.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 6bffa06..1a4d69e 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2905,7 +2905,13 @@ void cpu_ppc_reset (void *opaque)
     msr |= (target_ulong)1 << MSR_BE;
 #endif
 #if defined(CONFIG_USER_ONLY)
-    msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */
+    /* Initialize MSR with appropriate instruction capabilities.  */
+    if (env->msr_mask & ((target_ulong)1 << MSR_FP))
+      msr |= (target_ulong)1 << MSR_FP;
+    if (env->msr_mask & ((target_ulong)1 << MSR_VR))
+      msr |= (target_ulong)1 << MSR_VR;
+    if (env->msr_mask & ((target_ulong)1 << MSR_SPE))
+      msr |= (target_ulong)1 << MSR_SPE;
     msr |= (target_ulong)1 << MSR_PR;
 #else
     env->nip = env->hreset_vector | env->excp_prefix;