All of lore.kernel.org
 help / color / mirror / Atom feed
From: Suresh Siddha <suresh.b.siddha@intel.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "Huang, Ying" <ying.huang@intel.com>,
	"Siddha, Suresh B" <suresh.b.siddha@intel.com>,
	Sebastian Andrzej Siewior <linux-crypto@ml.breakpoint.cc>,
	"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
	"mingo@elte.hu" <mingo@elte.hu>,
	"tglx@linutronix.de" <tglx@linutronix.de>
Subject: Re: [RFC PATCH crypto] AES: Add support to Intel AES-NI instructions
Date: Mon, 15 Dec 2008 10:26:54 -0800	[thread overview]
Message-ID: <20081215182653.GC18346@linux-os.sc.intel.com> (raw)
In-Reply-To: <20081215033842.GA28499@gondor.apana.org.au>

On Sun, Dec 14, 2008 at 07:38:42PM -0800, Herbert Xu wrote:
> On Mon, Dec 15, 2008 at 10:19:02AM +0800, Huang Ying wrote:
> >
> > The general x86 implementation is used as the fall back for new AES-NI
> > based implementation. Because AES-NI can not be used in kernel soft_irq
> > context. If crypto layer is used to access general x86 implementation,
> 
> Why is that? The VIA PadLock also "touches" the SSE state but we still
> use it on softirq paths.
> 
> In fact Suresh told me earlier that your AES instruction wasn't
> going to have the SSE problems that VIA had, is this not the case?

As Huang mentioned, AES instructions touch SSE registers and thus have
different requirements. I agree that we have to do some performance
analysis to come up with the optimized model.

thanks,
suresh

  parent reply	other threads:[~2008-12-15 18:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-12-12  4:08 [RFC PATCH crypto] AES: Add support to Intel AES-NI instructions Huang Ying
2008-12-12 19:57 ` Sebastian Andrzej Siewior
2008-12-15  2:19   ` Huang Ying
2008-12-15  3:38     ` Herbert Xu
2008-12-15  5:14       ` Huang Ying
2008-12-15  5:21         ` Herbert Xu
2008-12-15  5:48           ` Huang Ying
2008-12-15 12:38           ` Herbert Xu
2008-12-16 23:31             ` Herbert Xu
2008-12-17  1:14               ` Huang Ying
2008-12-17  1:26                 ` Herbert Xu
2008-12-17  3:33                   ` Huang Ying
2008-12-17  3:39                     ` Herbert Xu
2008-12-15 18:26       ` Suresh Siddha [this message]
2008-12-15  9:07     ` Sebastian Andrzej Siewior
2008-12-15 11:28       ` Herbert Xu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20081215182653.GC18346@linux-os.sc.intel.com \
    --to=suresh.b.siddha@intel.com \
    --cc=akpm@linux-foundation.org \
    --cc=herbert@gondor.apana.org.au \
    --cc=linux-crypto@ml.breakpoint.cc \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@elte.hu \
    --cc=tglx@linutronix.de \
    --cc=ying.huang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.