From: Ralf Baechle <ralf@linux-mips.org>
To: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Define __arch_swab64 for all mips r2 cpus.
Date: Thu, 18 Dec 2008 08:07:40 +0000 [thread overview]
Message-ID: <20081218080740.GA15338@linux-mips.org> (raw)
In-Reply-To: <1229546644-3030-1-git-send-email-ddaney@caviumnetworks.com>
On Wed, Dec 17, 2008 at 12:44:04PM -0800, David Daney wrote:
> Some CPUs implement mipsr2, but because they are a super-set of
> mips64r2 do not define CONFIG_CPU_MIPS64_R2. Cavium OCTEON falls into
> this category. We would still like to use the optimized
> implementation, so since we have already checked for
> CONFIG_CPU_MIPSR2, checking for CONFIG_64BIT instead of
> CONFIG_CPU_MIPS64_R2 is sufficient.
>
> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
> ---
> arch/mips/include/asm/byteorder.h | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h
> index 2988d29..92ec1e1 100644
> --- a/arch/mips/include/asm/byteorder.h
> +++ b/arch/mips/include/asm/byteorder.h
> @@ -46,7 +46,7 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
> }
> #define __arch_swab32 __arch_swab32
>
> -#ifdef CONFIG_CPU_MIPS64_R2
> +#ifdef CONFIG_64BIT
This breaks every non-R2 64-bit processor.
Ralf
next prev parent reply other threads:[~2008-12-18 8:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-17 20:44 [PATCH] MIPS: Define __arch_swab64 for all mips r2 cpus David Daney
2008-12-17 21:20 ` David Daney
2008-12-18 8:07 ` Ralf Baechle [this message]
2008-12-18 16:42 ` David Daney
2008-12-18 17:06 ` Ralf Baechle
-- strict thread matches above, loose matches on Subject: below --
2009-06-26 16:02 David Daney
2009-06-28 18:50 ` Ralf Baechle
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