From: Nathan Lynch <ntl@pobox.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH/RFC] sysfs cache code rewrite
Date: Wed, 7 Jan 2009 12:48:23 -0600 [thread overview]
Message-ID: <20090107184823.GE7376@localdomain> (raw)
In-Reply-To: <1231323344.14860.87.camel@pasglop>
Benjamin Herrenschmidt wrote:
> On Wed, 2009-01-07 at 03:46 -0600, Nathan Lynch wrote:
> > Benjamin Herrenschmidt wrote:
> > >
> > > > I don't know quite the detail of the new cpumask stuff ... It could be
> > > > as simple as passing a pointer instead of the value in the
> > > > cpumask_scnprintf call though...
> > >
> > > Actually, I'll do more tests and if that ends up being the only needed
> > > change, I'll push your patch with that small change out to powerpc next
> > > tonight.
> >
> > Sorry about that, here's an incremental... let me know if you want the
> > whole thing re-posted.
>
> Nah, that's fine. I did that exact change in the patch before putting
> in my tree. I haven't had a chance to test boot tho, did you ?
I have now, on Power6, with latest Linus -git snapshot; comes up fine
and the shared_cpu_map attrs display as expected. This one is in
shared processor mode so we only have L1 information:
# uname -r
2.6.28-git9-autokern1
# grep -r . /sys/devices/system/cpu/cpu*/cache
/sys/devices/system/cpu/cpu0/cache/index0/type:Data
/sys/devices/system/cpu/cpu0/cache/index0/level:1
/sys/devices/system/cpu/cpu0/cache/index0/shared_cpu_map:00000000,00000000,00000000,00000003
/sys/devices/system/cpu/cpu0/cache/index0/size:64K
/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu0/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu0/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu0/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu0/cache/index1/level:1
/sys/devices/system/cpu/cpu0/cache/index1/shared_cpu_map:00000000,00000000,00000000,00000003
/sys/devices/system/cpu/cpu0/cache/index1/size:64K
/sys/devices/system/cpu/cpu0/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu0/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu0/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu1/cache/index0/type:Data
/sys/devices/system/cpu/cpu1/cache/index0/level:1
/sys/devices/system/cpu/cpu1/cache/index0/shared_cpu_map:00000000,00000000,00000000,00000003
/sys/devices/system/cpu/cpu1/cache/index0/size:64K
/sys/devices/system/cpu/cpu1/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu1/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu1/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu1/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu1/cache/index1/level:1
/sys/devices/system/cpu/cpu1/cache/index1/shared_cpu_map:00000000,00000000,00000000,00000003
/sys/devices/system/cpu/cpu1/cache/index1/size:64K
/sys/devices/system/cpu/cpu1/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu1/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu1/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu2/cache/index0/type:Data
/sys/devices/system/cpu/cpu2/cache/index0/level:1
/sys/devices/system/cpu/cpu2/cache/index0/shared_cpu_map:00000000,00000000,00000000,0000000c
/sys/devices/system/cpu/cpu2/cache/index0/size:64K
/sys/devices/system/cpu/cpu2/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu2/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu2/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu2/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu2/cache/index1/level:1
/sys/devices/system/cpu/cpu2/cache/index1/shared_cpu_map:00000000,00000000,00000000,0000000c
/sys/devices/system/cpu/cpu2/cache/index1/size:64K
/sys/devices/system/cpu/cpu2/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu2/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu2/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu3/cache/index0/type:Data
/sys/devices/system/cpu/cpu3/cache/index0/level:1
/sys/devices/system/cpu/cpu3/cache/index0/shared_cpu_map:00000000,00000000,00000000,0000000c
/sys/devices/system/cpu/cpu3/cache/index0/size:64K
/sys/devices/system/cpu/cpu3/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu3/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu3/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu3/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu3/cache/index1/level:1
/sys/devices/system/cpu/cpu3/cache/index1/shared_cpu_map:00000000,00000000,00000000,0000000c
/sys/devices/system/cpu/cpu3/cache/index1/size:64K
/sys/devices/system/cpu/cpu3/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu3/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu3/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu4/cache/index0/type:Data
/sys/devices/system/cpu/cpu4/cache/index0/level:1
/sys/devices/system/cpu/cpu4/cache/index0/shared_cpu_map:00000000,00000000,00000000,00000030
/sys/devices/system/cpu/cpu4/cache/index0/size:64K
/sys/devices/system/cpu/cpu4/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu4/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu4/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu4/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu4/cache/index1/level:1
/sys/devices/system/cpu/cpu4/cache/index1/shared_cpu_map:00000000,00000000,00000000,00000030
/sys/devices/system/cpu/cpu4/cache/index1/size:64K
/sys/devices/system/cpu/cpu4/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu4/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu4/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu5/cache/index0/type:Data
/sys/devices/system/cpu/cpu5/cache/index0/level:1
/sys/devices/system/cpu/cpu5/cache/index0/shared_cpu_map:00000000,00000000,00000000,00000030
/sys/devices/system/cpu/cpu5/cache/index0/size:64K
/sys/devices/system/cpu/cpu5/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu5/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu5/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu5/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu5/cache/index1/level:1
/sys/devices/system/cpu/cpu5/cache/index1/shared_cpu_map:00000000,00000000,00000000,00000030
/sys/devices/system/cpu/cpu5/cache/index1/size:64K
/sys/devices/system/cpu/cpu5/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu5/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu5/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu6/cache/index0/type:Data
/sys/devices/system/cpu/cpu6/cache/index0/level:1
/sys/devices/system/cpu/cpu6/cache/index0/shared_cpu_map:00000000,00000000,00000000,000000c0
/sys/devices/system/cpu/cpu6/cache/index0/size:64K
/sys/devices/system/cpu/cpu6/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu6/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu6/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu6/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu6/cache/index1/level:1
/sys/devices/system/cpu/cpu6/cache/index1/shared_cpu_map:00000000,00000000,00000000,000000c0
/sys/devices/system/cpu/cpu6/cache/index1/size:64K
/sys/devices/system/cpu/cpu6/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu6/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu6/cache/index1/ways_of_associativity:4
/sys/devices/system/cpu/cpu7/cache/index0/type:Data
/sys/devices/system/cpu/cpu7/cache/index0/level:1
/sys/devices/system/cpu/cpu7/cache/index0/shared_cpu_map:00000000,00000000,00000000,000000c0
/sys/devices/system/cpu/cpu7/cache/index0/size:64K
/sys/devices/system/cpu/cpu7/cache/index0/coherency_line_size:128
/sys/devices/system/cpu/cpu7/cache/index0/number_of_sets:128
/sys/devices/system/cpu/cpu7/cache/index0/ways_of_associativity:4
/sys/devices/system/cpu/cpu7/cache/index1/type:Instruction
/sys/devices/system/cpu/cpu7/cache/index1/level:1
/sys/devices/system/cpu/cpu7/cache/index1/shared_cpu_map:00000000,00000000,00000000,000000c0
/sys/devices/system/cpu/cpu7/cache/index1/size:64K
/sys/devices/system/cpu/cpu7/cache/index1/coherency_line_size:128
/sys/devices/system/cpu/cpu7/cache/index1/number_of_sets:128
/sys/devices/system/cpu/cpu7/cache/index1/ways_of_associativity:4
prev parent reply other threads:[~2009-01-07 18:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-24 4:55 [PATCH/RFC] sysfs cache code rewrite Nathan Lynch
2009-01-06 21:25 ` Nathan Lynch
2009-01-07 6:51 ` Benjamin Herrenschmidt
2009-01-07 6:55 ` Benjamin Herrenschmidt
2009-01-07 9:46 ` Nathan Lynch
2009-01-07 10:15 ` Benjamin Herrenschmidt
2009-01-07 18:48 ` Nathan Lynch [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20090107184823.GE7376@localdomain \
--to=ntl@pobox.com \
--cc=benh@kernel.crashing.org \
--cc=linuxppc-dev@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.