From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LURsk-0008AR-1M for qemu-devel@nongnu.org; Tue, 03 Feb 2009 15:28:30 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LURsj-0008A4-Jo for qemu-devel@nongnu.org; Tue, 03 Feb 2009 15:28:29 -0500 Received: from [199.232.76.173] (port=53794 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LURsj-00089o-1H for qemu-devel@nongnu.org; Tue, 03 Feb 2009 15:28:29 -0500 Received: from hall.aurel32.net ([88.191.82.174]:47114) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LURsi-0001bR-Gl for qemu-devel@nongnu.org; Tue, 03 Feb 2009 15:28:28 -0500 Date: Tue, 3 Feb 2009 21:28:24 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 2/2] target-sh4: implement ftrv instruction Message-ID: <20090203202824.GK18984@volta.aurel32.net> References: <1227297342-5285-1-git-send-email-mans@mansr.com> <1227297342-5285-2-git-send-email-mans@mansr.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1227297342-5285-2-git-send-email-mans@mansr.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mans Rullgard Cc: qemu-devel@nongnu.org On Fri, Nov 21, 2008 at 07:55:42PM +0000, Mans Rullgard wrote: > This partially implements the ftrv instruction. It gives correct > results under normal conditions. FPU exceptions are not correctly > generated. > > Signed-off-by: Mans Rullgard > --- > target-sh4/translate.c | 40 ++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 40 insertions(+), 0 deletions(-) > > diff --git a/target-sh4/translate.c b/target-sh4/translate.c > index 2d6dfe6..9c2da41 100644 > --- a/target-sh4/translate.c > +++ b/target-sh4/translate.c > @@ -1694,6 +1694,46 @@ static void _decode_opc(DisasContext * ctx) > tcg_temp_free_i64(fp); > } > return; > + case 0xf0fd: /* ftrv XMTRX,FVn */ > + if ((ctx->opcode & 0x300) != 0x100) > + break; > + if (!(ctx->fpscr & FPSCR_PR)) { > + TCGv fv[4]; > + TCGv fp; > + int n = B11_8 & 0xc; > + int i; > + > + /* > + * NOTE: The values calculated here are likely to differ > + * from hardware since the hardware sacrifices accuracy > + * for speed in this instruction. > + * > + * FIXME: FPU exceptions are not correctly raised here. > + */ > + > + fp = tcg_temp_new(); > + > + for (i = 0; i < 4; i++) { > + fv[i] = tcg_temp_new(); > + tcg_gen_mov_i32(fv[i], cpu_fregs[n+i]); > + } > + > + for (i = 0; i < 4; i++) { > + gen_helper_fmul_FT(cpu_fregs[n+i], cpu_fregs[16+i], fv[0]); > + gen_helper_fmul_FT(fp, cpu_fregs[20+i], fv[1]); > + gen_helper_fadd_FT(cpu_fregs[n+i], cpu_fregs[n+i], fp); > + gen_helper_fmul_FT(fp, cpu_fregs[24+i], fv[2]); > + gen_helper_fadd_FT(cpu_fregs[n+i], cpu_fregs[n+i], fp); > + gen_helper_fmul_FT(fp, cpu_fregs[28+i], fv[3]); > + gen_helper_fadd_FT(cpu_fregs[n+i], cpu_fregs[n+i], fp); > + } > + > + for (i = 0; i < 4; i++) > + tcg_temp_free(fv[i]); > + tcg_temp_free(fp); > + return; > + } > + break; > } > > fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n", While this code probably produce the correct result, I am not sure it is the best way to do it. It calls 28 times an helper, and uses 5 temp variable. IMHO the ftrv should be implemented in an helper, called from translate.c. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net